flash: allow programming larger EC images

For some ECs, the EC image size is limited by the amount of code RAM
instead of 1/2 the total flash size. In this instance, there is unused
flash that can be used for single use data objects.

To support linking data objects into the unused flash area, increase the
region size that can be programmed for RW images.

Analysis of chips that are impacted by this change:
    Chip          EC image limit    New RW size limit
    mec1701h      188 KiB           256 KiB
    mec17xx_2E00  188 KiB           256 KiB
    npcx5m5g      96 KiB            128 KiB
    npcx5m6g      224 KiB           256 KiB
    npcx7m6f      192 KiB           256 KiB
    npcx7m6fb     192 KiB           256 KiB
    npcx7m6fc     192 KiB           256 KiB
    npcx7m6g      192 KiB           256 KiB
    npcx7m7wb     256 KiB           512 KiB
    npcx7m7wc     252 KiB           256 KiB

Boards using other chips verified that CONFIG_RW_SIZE is the same as
CONFIG_EC_WRITABLE_STORAGE_SIZE.

EC_FLASH_REGION_RO isn't used by depthcharge, only EC_FLASH_REGION_WP_RO
which is already set to the correct size.

BUG=b:160330682
BRANCH=none
TEST=make buildall

Signed-off-by: Keith Short <keithshort@chromium.org>
Change-Id: I84b9dc84568273e1ab1473e301d27ffd2b07ba7f
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2325764
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
Reviewed-by: caveh jalali <caveh@chromium.org>
Commit-Queue: caveh jalali <caveh@chromium.org>

0 files changed, 0 insertions, 0 deletions