summaryrefslogtreecommitdiff
path: root/core
diff options
context:
space:
mode:
authorJack Rosenthal <jrosenth@chromium.org>2019-06-19 15:33:32 -0600
committerCommit Bot <commit-bot@chromium.org>2019-06-24 22:45:18 +0000
commit52e914fa8e674f61b9602f124e998a74adbc2b61 (patch)
tree4a3b18d5fab03b12e1443c10233f36e83663c356 /core
parentc6aa7a384d179128339068531f79baed3a42ceef (diff)
downloadchrome-ec-52e914fa8e674f61b9602f124e998a74adbc2b61.tar.gz
ish: Use 64-bit hardware timer
ISH has native support for storing the hardware ticks in a 64-bit integer. With CONFIG_HWTIMER_64BIT, we can use this instead of relying on the periodic rollover interrupt. BUG=b:133190570,chromium:976804 BRANCH=none TEST=ran arcada_ish for more than 2³² μs, observed timer worked as normal Change-Id: I3b608c49081842f28d2ef8c16279992af1cb4fad Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1668056 Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Diffstat (limited to 'core')
-rw-r--r--core/minute-ia/interrupts.c1
1 files changed, 0 insertions, 1 deletions
diff --git a/core/minute-ia/interrupts.c b/core/minute-ia/interrupts.c
index 07c4c71ef0..58db2bee27 100644
--- a/core/minute-ia/interrupts.c
+++ b/core/minute-ia/interrupts.c
@@ -146,7 +146,6 @@ static const irq_desc_t system_irqs[] = {
LEVEL_INTR(ISH_GPIO_IRQ, ISH_GPIO_VEC),
LEVEL_INTR(ISH_IPC_HOST2ISH_IRQ, ISH_IPC_VEC),
LEVEL_INTR(ISH_IPC_ISH2HOST_CLR_IRQ, ISH_IPC_ISH2HOST_CLR_VEC),
- LEVEL_INTR(ISH_HPET_TIMER0_IRQ, ISH_HPET_TIMER0_VEC),
LEVEL_INTR(ISH_HPET_TIMER1_IRQ, ISH_HPET_TIMER1_VEC),
LEVEL_INTR(ISH_DEBUG_UART_IRQ, ISH_DEBUG_UART_VEC),
LEVEL_INTR(ISH_FABRIC_IRQ, ISH_FABRIC_VEC),