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| author | Tzung-Bi Shih <tzungbi@chromium.org> | 2020-06-30 10:28:04 +0800 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2020-07-03 19:35:27 +0000 |
| commit | fc566f558279c272c2a4202a3be91de10594580f (patch) | |
| tree | 2e95e3adc526e3ebfe64c3f2a3f8b002357c12a9 /core | |
| parent | e8d3c6227ebb1492d9ad94394a3c6ac9badb4b4e (diff) | |
| download | chrome-ec-fc566f558279c272c2a4202a3be91de10594580f.tar.gz | |
core/riscv-rv32i: add atomic_inc and atomic_dec
BRANCH=none
BUG=b:146213943
TEST=make BOARD=asurada_scp
Signed-off-by: Tzung-Bi Shih <tzungbi@chromium.org>
Change-Id: I3d87c9906df1b631fa3733eeae92d356ec287611
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2275710
Reviewed-by: Dino Li <Dino.Li@ite.com.tw>
Reviewed-by: Eric Yilun Lin <yllin@chromium.org>
Diffstat (limited to 'core')
| -rw-r--r-- | core/riscv-rv32i/atomic.h | 17 |
1 files changed, 11 insertions, 6 deletions
diff --git a/core/riscv-rv32i/atomic.h b/core/riscv-rv32i/atomic.h index 11765a2615..d9f25cd38d 100644 --- a/core/riscv-rv32i/atomic.h +++ b/core/riscv-rv32i/atomic.h @@ -19,6 +19,7 @@ "amo" #op ".w.aqrl %0, %2, %1" \ : "=r" (tmp), "+A" (*addr) \ : "r" (value)); \ + tmp; \ }) static inline void atomic_clear(volatile uint32_t *addr, uint32_t bits) @@ -43,13 +44,17 @@ static inline void atomic_sub(volatile uint32_t *addr, uint32_t value) static inline uint32_t atomic_read_clear(volatile uint32_t *addr) { - uint32_t ret; + return ATOMIC_OP(and, 0, addr); +} - asm volatile ( - "amoand.w.aqrl %0, %2, %1" - : "=r" (ret), "+A" (*addr) - : "r" (0)); +static inline uint32_t atomic_inc(volatile uint32_t *addr, uint32_t value) +{ + return ATOMIC_OP(add, value, addr); +} - return ret; +static inline uint32_t atomic_dec(volatile uint32_t *addr, uint32_t value) +{ + return ATOMIC_OP(add, -value, addr); } + #endif /* __CROS_EC_ATOMIC_H */ |