cortex-m/ec.ld.S: Fix DRAM section layout.

This CL fixes DRAM section loaded at the wrong location, and
also relayouts the DRAM section to have a smaller flat binary.

Current DRAM region layout is as below:

.dram.data LMA | LOAD
.dram.data VMA |
.dram.bss      | NOLOAD
.dram.rodata   | LOAD
.dram.text     | LOAD

This will create a flat binary file as following layout:

.dram.data
.dram.bss
.dram.rodata
.dram.text

and loader will load .flat.dram to .dram.data LMA's starting section.
This leads to .dram.bss, .dram.rodata  and .dram.text been loaded at
the wrong location, where .dram.data VMA resides.

This CL fixes the issue by reorganize the sections into:

.dram.text     | LOAD
.dram.rodata   | LOAD
.dram.data LMA | LOAD
.dram.data VMA |
.dram.bss      | NOLOAD

and thus we have a flat binary as:

.dram.text
.dram.rodata
.dram.data

so that:
1. everything will be placed at the correct address.
2. have a smaller flat binary.

The CL also removes .dram.keep.* section, which is not used so far.

BUG=b:134079593
BRANCH=master
TEST=With crrev.com/c/1646691, check the output of object header:
1. SIZEOF(.dram.text + .dram.rodata + .dram.data) = SIZEOF(.image.RW.dram)
          0x68         0x18           0x14                 0x94
2. ADDR(.dram.data LMA) + SIZEOF(.dram.data) = ADDR(.dram.data VMA)
   0x10000080            0x14                 0x10000094

arm-none-eabi-objdump -h build/kukui_scp/RW/ec.RW.elf
Idx Name          Size      VMA       LMA       File off  Algn
  5 .dram.text    00000068  10000000  10000000  00030000  2**3
                  CONTENTS, ALLOC, LOAD, READONLY, CODE
  6 .dram.rodata  00000018  10000068  10000068  00030068  2**2
                  CONTENTS, ALLOC, LOAD, READONLY, DATA
  7 .dram.data    00000014  10000094  10000080  00030094  2**0
                  CONTENTS, ALLOC, LOAD, DATA
  8 .dram.bss     00000004  100000a8  100000a8  000300a8  2**0
                  ALLOC

arm-none-eabi-objdump -h build/kukui_scp/ec.obj
Idx Name           Size      VMA       LMA       File off  Algn
  2 .image.RW.dram 00000094  50000000  50000000  00020000  2**0
                  CONTENTS, ALLOC, LOAD, READONLY, CODE

TEST=With crrev.com/c/1646691, see the console has correct output:
dram_bss_val = 0
dram_data_val[0]= 1
dram_data_val[1]= 2
dram_data_val[2]= 3
dram_data_val[3]= 4
dram_data_val[4]= 5
dram_data_val[5]= 6
dram_data_val[6]= 7
dram_data_val[7]= 8
dram_data_val[8]= 9
dram_data_val[9]= 10
dram_data_val[10]= 11
dram_data_val[11]= 12
dram_data_val[12]= 13
dram_data_val[13]= 14
dram_data_val[14]= 15
dram_data_val[15]= 16
dram_data_val[16]= 17
dram_rodata_val[0]= 55
dram_rodata_val[1]= 56
dram_rodata_val[2]= 57
dram_rodata_val[3]= 58
dram_rodata_val[4]= 59
dram_rodata_val[5]= 60

Change-Id: Ic6836c6ad553d0ceae4d55df92caa1896fee905d
Signed-off-by: Yilun Lin <yllin@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1646690
Tested-by: Yilun Lin <yllin@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Commit-Queue: Yilun Lin <yllin@chromium.org>
Auto-Submit: Yilun Lin <yllin@chromium.org>

1 files changed, 45 insertions, 18 deletions

diff --git a/core/cortex-m/ec.lds.S b/core/cortex-m/ec.lds.S
index f4524682e1..5cac211b9d 100644
--- a/core/cortex-m/ec.lds.S
+++ b/core/cortex-m/ec.lds.S
@@ -433,27 +433,60 @@ SECTIONS
 #endif /* CONFIG_CHIP_MEMORY_REGIONS */
 
 #ifdef CONFIG_DRAM_BASE
+
     /*
-     * Allocate space for original copy of .data.dram (see .data_lma above).
-     * TODO(b:128269393): Remove .dram.data_lma sections to be compatible
-     * with clang.
+     * Sections in DRAM region are constructed as like in non-DRAM regions:
+     * .dram.data LMA is for preserving initialized data across resets.
+     * The only difference is that they are all in the DRAM region:
+     * .dram.text     | LOAD
+     * .dram.rodata   | LOAD
+     * .dram.data LMA | LOAD
+     * .dram.data VMA |
+     * .dram.bss      | NOLOAD
+     * TODO(b:123269246): Enable MPU protectable DRAM section.  This might
+     * introduce a RO-DRAM section for .dram.text, .dram.rodata and
+     * .dram.data LMA.
      */
-    .dram.data_lma : {
-        __dram_data_lma_start = .;
-        . += __dram_data_end - __dram_data_start;
+
+    .dram.text : {
+        . = ALIGN(4);
+        KEEP(*(SORT(.dram.text.keep.*)))
+        *(SORT(.dram.text.*))
+        . = ALIGN(4);
     } > DRAM
 
+    .dram.rodata : {
+        . = ALIGN(4);
+        KEEP(*(SORT(.dram.rodata.keep.*)))
+        *(SORT(.dram.rodata.*))
+        . = ALIGN(4);
+    } > DRAM
+
+    __dram_data_lma_start = ADDR(.dram.rodata) + SIZEOF(.dram.rodata);
+
+    /* Place .dram.data LMA in between .dram.rodata and .dram.data VMA. */
+#ifdef __clang__
     /*
-     * TODO(b:122058243): Both .dram.data and .dram.bss do not actually
-     * need to be in the final image, as we have a second copy of the data
-     * (just above), and dram.bss is zeroed anyway.
+     * The evaluation timing for SIZEOF() and symbols are different in
+     * ld and lld.
      */
-    .dram.data : AT(ADDR(.dram.data_lma)) {
+    .dram.data __dram_data_lma_start + SIZEOF(.dram.data) : {
+#else
+    .dram.data __dram_data_lma_start + (__dram_data_end - __dram_data_start) : {
+#endif /* __clang__ */
         . = ALIGN(4);
         __dram_data_start = .;
         *(.dram.data*)
+        . = ALIGN(4);
         __dram_data_end = .;
-    } > DRAM
+    /*
+     * Normally, '> DRAM AT > DRAM' should be the same as '> DRAM', and they
+     * will be at the same address.  However, if the address of VMA specified,
+     * LMA and VMA might have different addresses:
+     * '> DRAM' places VMA at the address where section declaration specified.
+     * 'AT > DRAM' places LMA at the location counter's address.
+     */
+    } > DRAM AT > DRAM
 
     /*
      * ld assigns correct attribute for .bss, but not for other .*.bss, we need
@@ -463,14 +496,8 @@ SECTIONS
         . = ALIGN(4);
         __dram_bss_start = .;
         *(SORT(.dram.bss*))
-        __dram_bss_end = .;
-    } > DRAM
-
-    /* Rest of DRAM sections, e.g. text. */
-    .dram : {
         . = ALIGN(4);
-        KEEP(*(SORT(.dram.keep.*)))
-        *(SORT(.dram.*))
+        __dram_bss_end = .;
     } > DRAM
 #endif