diff options
| author | Mary Ruthven <mruthven@chromium.org> | 2021-01-05 16:46:32 -0800 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2021-01-07 19:21:43 +0000 |
| commit | 96dd761f8a9a2858eb205efaf3bfa1352333f347 (patch) | |
| tree | f5f89638845acaf4370497df8e1b1097605c6dc3 /core | |
| parent | ade6b1e007428e85dc9b69e9a9c259bc6622f0d4 (diff) | |
| download | chrome-ec-96dd761f8a9a2858eb205efaf3bfa1352333f347.tar.gz | |
coil: CONFIG_I2C_SLAVE->CONFIG_I2C_PERIPH
BUG=b:175244613
TEST=make buildall -j
Change-Id: Icd2d47a031c5132cb9bca618c5c5ed8cd9e80c07
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2611756
Reviewed-by: Namyoon Woo <namyoon@chromium.org>
Diffstat (limited to 'core')
| -rw-r--r-- | core/riscv-rv32i/ec.lds.S | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/core/riscv-rv32i/ec.lds.S b/core/riscv-rv32i/ec.lds.S index 53e6b99599..f34822d909 100644 --- a/core/riscv-rv32i/ec.lds.S +++ b/core/riscv-rv32i/ec.lds.S @@ -28,7 +28,7 @@ MEMORY ILM (rx) : ORIGIN = FW_OFF(SECTION), LENGTH = FW_SIZE(SECTION) IRAM (rw) : ORIGIN = CONFIG_RAM_BASE + CHIP_RAM_SPACE_RESERVED, LENGTH = CONFIG_RAM_SIZE - CHIP_RAM_SPACE_RESERVED -#if defined(CONFIG_HOSTCMD_X86) || defined(CONFIG_I2C_SLAVE) +#if defined(CONFIG_HOSTCMD_X86) || defined(CONFIG_I2C_PERIPH) H2RAM (rw) : ORIGIN = CONFIG_H2RAM_BASE, LENGTH = CONFIG_H2RAM_SIZE #endif } @@ -243,13 +243,13 @@ SECTIONS __image_size = LOADADDR(.data) + SIZEOF(.data) + \ CHIP_ILM_BASE - FW_OFF(SECTION); -#if defined(CONFIG_HOSTCMD_X86) || defined(CONFIG_I2C_SLAVE) +#if defined(CONFIG_HOSTCMD_X86) || defined(CONFIG_I2C_PERIPH) .h2ram (NOLOAD) : { . += CONFIG_H2RAM_HOST_LPC_IO_BASE; *(.h2ram.pool.hostcmd) . = ALIGN(256); *(.h2ram.pool.acpiec) -#ifdef CONFIG_I2C_SLAVE +#ifdef CONFIG_I2C_PERIPH . = ALIGN(256); *(.h2ram.pool.i2cslv) #endif |