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| author | ChromeOS Developer <dparker@chromium.org> | 2014-03-24 19:54:05 -0700 |
|---|---|---|
| committer | chrome-internal-fetch <chrome-internal-fetch@google.com> | 2014-03-26 05:33:35 +0000 |
| commit | 7895c278033acbb0f55020e5ac54fa8e6e669f14 (patch) | |
| tree | 71365d782e21c3d079520dfc3c8a3020ac59503a /core | |
| parent | d430602af8db20b8c8f173178ed0068f06a93926 (diff) | |
| download | chrome-ec-7895c278033acbb0f55020e5ac54fa8e6e669f14.tar.gz | |
cortex-m: Add debug config option for disabling buffered writes
This can be helpful when debugging "Imprecise" data bus errors.
BUG=None
BRANCH=None
TEST=Write to a memory-mapped register such as LM4_ADC_ADCISC
for a hardware block that is powered down.
Check the exception trace for a "Precise" error.
Change-Id: Ia246c3661b482e212bb0ce37b9c2d383021de639
Signed-off-by: Dave Parker <dparker@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/191392
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Diffstat (limited to 'core')
| -rw-r--r-- | core/cortex-m/init.S | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/core/cortex-m/init.S b/core/cortex-m/init.S index 00072c7f0f..0f5a3e2310 100644 --- a/core/cortex-m/init.S +++ b/core/cortex-m/init.S @@ -364,6 +364,16 @@ data_loop: isb #endif /* CONFIG_FPU */ +#ifdef CONFIG_DEBUG_DISABLE_WRITE_BUFFER + /* Disable write buffer used for default memory map accesses */ + ldr r0, =0xE000E008 /* Load address of ACTLR */ + ldr r1, [r0] /* Read ACTLR */ + orr r1, r1, #2 /* Set DISDEFWBUF bit */ + str r1, [r0] /* Write back ACTLR */ + dsb /* Wait for store to complete */ + isb /* Reset pipeline */ +#endif /* CONFIG_DEBUG_DISABLE_WRITE_BUFFER */ + /* Jump to C code */ bl main |