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author | Hu, Hebo <hebo.hu@intel.com> | 2019-06-04 15:46:33 +0800 |
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committer | Commit Bot <commit-bot@chromium.org> | 2019-06-21 16:30:59 +0000 |
commit | 37e37749de6a969275bd9453204a01b494bfd854 (patch) | |
tree | 153bd4398c09d5c01d003b2f471717463b46a6fa /core | |
parent | 8fd4f4548eba5f2ad1d22ebd1b345f7cbce68579 (diff) | |
download | chrome-ec-37e37749de6a969275bd9453204a01b494bfd854.tar.gz |
ish: fixed wrongly entered D0ix states in some times
In __idle() task, when calculate the 'next_delay' value (the
sleep time), in most time, 'next_delay' should be always positive,
but ISH HPET timer HW has some latency for interrupt, so it's
possible in some times when its very close to the expire
time of the event timer, the current time could advance the
'last_deadline' which should be updated in event timer ISR,
in this case, 'next_delay' could be negative.
We calibrated the 'last_deadline' in timer driver for
this interrupt latency impact.
So, the negative case for 'next_delay' should be not happen.
If still happens, its doesn't matter, we can just ignore it
, and if not want to see this case, can adjust the
'HPET_INT_LATENCY_TICKS' for new calibration till its not
happen anymore.
BUG=b:133459192
BRANCH=none
TEST=tested on arcada platform, with 10ms timer loop task, D0i2/D0i3
should not entered.
Change-Id: Ie84fb630900dd7d59a41c98c08da4a71a831c030
Signed-off-by: Hu, Hebo <hebo.hu@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1643247
Tested-by: Hyungwoo Yang <hyungwoo.yang@intel.com>
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Commit-Queue: Jack Rosenthal <jrosenth@chromium.org>
Diffstat (limited to 'core')
0 files changed, 0 insertions, 0 deletions