summaryrefslogtreecommitdiff
path: root/core
diff options
context:
space:
mode:
authorTom Hughes <tomhughes@chromium.org>2021-09-30 17:35:15 +0000
committerCommit Bot <commit-bot@chromium.org>2021-11-09 20:01:04 +0000
commit01afc0fb674113c3ec59b7b19a071840e18a1888 (patch)
tree27eb732e9409ed3ef472b4638f006ebdfe66650e /core
parent107bea02fefdc4286e929d5cde48b2a57a0ded21 (diff)
downloadchrome-ec-01afc0fb674113c3ec59b7b19a071840e18a1888.tar.gz
core/cortex-m0: Fix inline asm in in_interrupt_context
"lsl" is not a valid instruction for Cortex-M0: https://developer.arm.com/documentation/ddi0432/c/CHDCICDF. Instead of "lsl", gcc will silently emit the correct variant of the instruction ("lsls" which updates condition codes). However, when using clang, it fails to compile due to the invalid instruction: core/cortex-m0/task.c:178:7: error: invalid instruction, any one of the following would fix this: "lsl %0, #23\n" : "=r"(ret)); /* exception bits are the 9 LSB */ ^ <inline asm>:2:1: note: instantiated into assembly here lsl r0, #23 ^ core/cortex-m0/task.c:178:7: note: instruction requires: thumb2 "lsl %0, #23\n" : "=r"(ret)); /* exception bits are the 9 LSB */ ^ <inline asm>:2:1: note: instantiated into assembly here lsl r0, #23 ^ core/cortex-m0/task.c:178:7: note: no flag-preserving variant of this instruction available "lsl %0, #23\n" : "=r"(ret)); /* exception bits are the 9 LSB */ ^ Instead of writing assembly to do the shifting, use C. The generated code adds a few instructions since we're now returning a "bool" (0 or 1) instead of the raw shifted value: Before: arm-none-eabi-objdump -d build/servo_micro/RO/core/cortex-m0/task.o 00000000 <in_interrupt_context>: 0: f3ef 8005 mrs r0, IPSR 4: 05c0 lsls r0, r0, #23 6: 4770 bx lr After: arm-none-eabi-objdump -d build/servo_micro/RO/core/cortex-m0/task.o 00000000 <in_interrupt_context>: 0: f3ef 8005 mrs r0, IPSR 4: 05c0 lsls r0, r0, #23 6: 1e43 subs r3, r0, #1 8: 4198 sbcs r0, r3 a: b2c0 uxtb r0, r0 c: 4770 bx lr BRANCH=none BUG=b:172020503 TEST=CC=clang make BOARD=servo_micro -j TEST=make buildall Signed-off-by: Tom Hughes <tomhughes@chromium.org> Change-Id: I530896186c2dbbd582f7c9973d1157ebe3601b34 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3197756 Reviewed-by: Keith Short <keithshort@chromium.org>
Diffstat (limited to 'core')
-rw-r--r--core/cortex-m0/task.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/core/cortex-m0/task.c b/core/cortex-m0/task.c
index af1886005b..274b6a263d 100644
--- a/core/cortex-m0/task.c
+++ b/core/cortex-m0/task.c
@@ -174,9 +174,9 @@ inline bool is_interrupt_enabled(void)
inline bool in_interrupt_context(void)
{
int ret;
- asm("mrs %0, ipsr\n" /* read exception number */
- "lsl %0, #23\n" : "=r"(ret)); /* exception bits are the 9 LSB */
- return ret;
+ asm("mrs %0, ipsr\n" /* read exception number */
+ : "=r"(ret));
+ return ret & GENMASK(8, 0); /* exception bits are the 9 LSB */
}
#ifdef CONFIG_TASK_PROFILING