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authorRandall Spangler <rspangler@chromium.org>2016-08-05 10:25:42 -0700
committerchrome-bot <chrome-bot@chromium.org>2016-09-24 13:53:26 -0700
commitb94747d501ad7e4347b50c3ea55e615422d96212 (patch)
treeb2c078ca5b87a8af29827474789475903f5b316f /core
parent5fa727805ca3222e9268755c54c15bbf87c5b2bd (diff)
downloadchrome-ec-b94747d501ad7e4347b50c3ea55e615422d96212.tar.gz
cr50: reset only the TPM state on SYS_RST_L
Rather than doing a full cr50 reset when the system reset SYS_RST_L is asserted, just reset the state of the TPM task and library. Re-clear .bss for those modules, then re-initialize. BRANCH=none BUG=chrome-os-partner:52366 CQ-DEPEND=CL:366792 TEST=make buildall; test on Gru Trigger a SYS_RST_L by using the AP's reboot command, power off/on, log in/out/in. See that the Cr50 does not reboot and the firmware and userspace are still happy about the TPM. Change-Id: I32cd2bb72316f68c74db77a20a8d09112b402d4b Signed-off-by: Randall Spangler <rspangler@chromium.org> Signed-off-by: Bill Richardson <wfrichar@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/361680
Diffstat (limited to 'core')
-rw-r--r--core/cortex-m/ec.lds.S16
1 files changed, 16 insertions, 0 deletions
diff --git a/core/cortex-m/ec.lds.S b/core/cortex-m/ec.lds.S
index 2b70535fa6..5b756cec58 100644
--- a/core/cortex-m/ec.lds.S
+++ b/core/cortex-m/ec.lds.S
@@ -243,6 +243,14 @@ SECTIONS
. = ALIGN(8);
*(.bss.system_stack)
/* Rest of .bss takes care of its own alignment */
+
+ /* Group libtpm2 data so it can be cleared on system reset */
+ __bss_libtpm2_start = .;
+ Tpm2_*(.bss)
+ /* TPM registers should be cleared at the same time */
+ STRINGIFY(OUTDIR/common/tpm_registers.o*)(.bss)
+ __bss_libtpm2_end = .;
+
*(.bss)
/*
@@ -284,6 +292,14 @@ SECTIONS
. = ALIGN(4);
__data_start = .;
*(.data.tasks)
+
+ /* Group libtpm2 data so it can be reinitialized on system reset */
+ __data_libtpm2_start = .;
+ Tpm2_*(.data)
+ /* TPM registers should be reinitialized at the same time */
+ STRINGIFY(OUTDIR/common/tpm_registers.o*)(.data)
+ __data_libtpm2_end = .;
+
*(.data)
#ifdef CONFIG_MPU
/* It has to be aligned by 32 bytes to be a valid MPU region. */