diff options
author | Tzung-Bi Shih <tzungbi@chromium.org> | 2020-03-23 12:12:28 +0800 |
---|---|---|
committer | Commit Bot <commit-bot@chromium.org> | 2020-05-19 08:55:33 +0000 |
commit | 57be4e6b00489ce571e8caf7f36b30d1a5f8c700 (patch) | |
tree | 8efd64388484a59c47afdfb08da78e33211ef8b7 /core | |
parent | cb352aa0d6986828bafb2c1b530ed6c93e6f2089 (diff) | |
download | chrome-ec-57be4e6b00489ce571e8caf7f36b30d1a5f8c700.tar.gz |
core/riscv-rv32i: move interrupt details to IT83XX specific
Getting source interrupt number is chip specific. Moves the details to
chip implementation.
BRANCH=none
BUG=b:151897847
TEST=1. make BOARD=asurada
2. flash_ec --board=asurada --image build/asurada/ec.bin
3. (EC console)> version
Signed-off-by: Tzung-Bi Shih <tzungbi@chromium.org>
Change-Id: Ia72acf8ec9c09cb329f8d7c92d22476512ffa669
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2114951
Reviewed-by: Eric Yilun Lin <yllin@chromium.org>
Diffstat (limited to 'core')
-rw-r--r-- | core/nds32/irq_chip.h | 10 | ||||
-rw-r--r-- | core/nds32/task.c | 35 | ||||
-rw-r--r-- | core/riscv-rv32i/irq_chip.h | 10 | ||||
-rw-r--r-- | core/riscv-rv32i/task.c | 11 |
4 files changed, 26 insertions, 40 deletions
diff --git a/core/nds32/irq_chip.h b/core/nds32/irq_chip.h index fc9f64c250..58cc138a45 100644 --- a/core/nds32/irq_chip.h +++ b/core/nds32/irq_chip.h @@ -56,4 +56,14 @@ void chip_init_irqs(void); */ int get_sw_int(void); +/** + * Return external interrupt number. + */ +int chip_get_ec_int(void); + +/** + * Return group number of the given external interrupt number. + */ +int chip_get_intc_group(int irq); + #endif /* __CROS_EC_IRQ_CHIP_H */ diff --git a/core/nds32/task.c b/core/nds32/task.c index f86ef61ea1..b3f2a0c642 100644 --- a/core/nds32/task.c +++ b/core/nds32/task.c @@ -171,9 +171,6 @@ int start_called; /* Has task swapping started */ /* interrupt number of sw interrupt */ static int sw_int_num; -/* Number of CPU hardware interrupts (HW0 ~ HW15) */ -int cpu_int_entry_number; - /* * This variable is used to save link pointer register, * and it is updated at the beginning of each ISR. @@ -346,41 +343,17 @@ void update_exc_start_time(void) } /* Interrupt number of EC modules */ -static volatile int ec_int; - -#ifdef CHIP_FAMILY_IT83XX -int __ram_code intc_get_ec_int(void) -{ - return ec_int; -} -#endif +volatile int ec_int; void __ram_code start_irq_handler(void) { /* save r0, r1, and r2 for syscall */ asm volatile ("smw.adm $r0, [$sp], $r2, 0"); /* If this is a SW interrupt */ - if (get_itype() & 8) { + if (get_itype() & 8) ec_int = get_sw_int(); - } else { -#ifdef CHIP_FAMILY_IT83XX - int i; - - for (i = 0; i < IT83XX_IRQ_COUNT; i++) { - ec_int = IT83XX_INTC_IVCT(cpu_int_entry_number); - /* - * WORKAROUND: when the interrupt vector register isn't - * latched in a load operation, - * we read it again to make sure the value we got - * is the correct value. - */ - if (ec_int == IT83XX_INTC_IVCT(cpu_int_entry_number)) - break; - } - /* Determine interrupt number */ - ec_int -= 16; -#endif - } + else + ec_int = chip_get_ec_int(); #if defined(CONFIG_LOW_POWER_IDLE) && defined(CHIP_FAMILY_IT83XX) clock_sleep_mode_wakeup_isr(); diff --git a/core/riscv-rv32i/irq_chip.h b/core/riscv-rv32i/irq_chip.h index 916de4ed57..ec56ddbb5d 100644 --- a/core/riscv-rv32i/irq_chip.h +++ b/core/riscv-rv32i/irq_chip.h @@ -56,4 +56,14 @@ void chip_init_irqs(void); */ int get_sw_int(void); +/** + * Return external interrupt number. + */ +int chip_get_ec_int(void); + +/** + * Return group number of the given external interrupt number. + */ +int chip_get_intc_group(int irq); + #endif /* __CROS_EC_IRQ_CHIP_H */ diff --git a/core/riscv-rv32i/task.c b/core/riscv-rv32i/task.c index 453b7a76f1..171cd221fe 100644 --- a/core/riscv-rv32i/task.c +++ b/core/riscv-rv32i/task.c @@ -163,7 +163,7 @@ int start_called; /* Has task swapping started */ /* in interrupt context */ static int in_interrupt; /* Interrupt number of EC modules */ -static volatile int ec_int; +volatile int ec_int; /* Interrupt group of EC INTC modules */ volatile int ec_int_group; /* interrupt number of sw interrupt */ @@ -309,13 +309,6 @@ void __ram_code update_exc_start_time(void) #endif } -#ifdef CHIP_FAMILY_IT83XX -int __ram_code intc_get_ec_int(void) -{ - return ec_int; -} -#endif - void __ram_code start_irq_handler(void) { /* save a0, a1, and a2 for syscall */ @@ -332,7 +325,7 @@ void __ram_code start_irq_handler(void) ec_int_group = 16; } else { /* Determine interrupt number */ - ec_int = IT83XX_INTC_AIVCT - 0x10; + ec_int = chip_get_ec_int(); ec_int_group = chip_get_intc_group(ec_int); } |