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author | Vincent Palatin <vpalatin@chromium.org> | 2012-03-14 22:23:52 +0000 |
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committer | Vincent Palatin <vpalatin@chromium.org> | 2012-03-14 22:34:35 +0000 |
commit | 0cde4cfec35d34fb77c75d655d098390b70c8655 (patch) | |
tree | 5561720223cb04db99b7dfc56de7a5614e45cf2c /core | |
parent | ce60b937cb172690222b19026212718aac6fd469 (diff) | |
download | chrome-ec-0cde4cfec35d34fb77c75d655d098390b70c8655.tar.gz |
ensure the re-scheduling is not interrupted
The re-scheduling is protected by increasing our priority to -1,
according to ARMv-M architecture manual, we need an ISB after setting
the faultmask register to ensure that the new priority is visible.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BUG=chrome-os-partner:8492
TEST=run on proto-0.5 and see that the temperature sensor and battery
tasks are longer hanging (see the bug for details how to check it)
Change-Id: Ia55859cf5c9101a09c61be7647a920126fc0a3b9
Diffstat (limited to 'core')
-rw-r--r-- | core/cortex-m/task.c | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/core/cortex-m/task.c b/core/cortex-m/task.c index 4e4928929e..41b91de348 100644 --- a/core/cortex-m/task.c +++ b/core/cortex-m/task.c @@ -164,12 +164,11 @@ uint32_t *task_get_event_bitmap(task_id_t tskid) void svc_handler(int desched, task_id_t resched) { task_ *current, *next; - uint32_t reg; /* push the priority to -1 until the return, to avoid being * interrupted */ - asm volatile("mov %0, #1\n" - "msr faultmask, %0" :"=r"(reg)); + asm volatile("cpsid f\n" + "isb\n"); current = __get_task_scheduled(); if (desched && !current->events) { /* Remove our own ready bit */ |