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| author | Denis Brockus <dbrockus@chromium.org> | 2019-06-25 12:44:16 -0600 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2019-07-19 21:11:02 +0000 |
| commit | d1a18f82ed831d4e640336ff5571f5fa64bc7b36 (patch) | |
| tree | c46aeb6136de1c27c66e3d5f662e9620161bef7b /cts | |
| parent | 1f14229fa7e499dfcee07d17add187598ff0a46c (diff) | |
| download | chrome-ec-d1a18f82ed831d4e640336ff5571f5fa64bc7b36.tar.gz | |
Use 7bit I2C/SPI slave addresses in EC
Opt for 7bit slave addresses in EC code. If 8bit is
expected by a driver, make it local and show this in
the naming.
Use __7b, __7bf and __8b as name extensions for i2c/spi
addresses used in the EC codebase. __7b indicates a
7bit address by itself. __7bf indicates a 7bit address
with optional flags attached. __8b indicates a 8bit
address by itself.
Allow space for 10bit addresses, even though this is
not currently being used by any of our attached
devices.
These extensions are for verification purposes only and
will be removed in the last pass of this ticket. I want
to make sure the variable names reflect the type to help
eliminate future 7/8/7-flags confusion.
BUG=chromium:971296
BRANCH=none
TEST=make buildall -j
Change-Id: I2fc3d1b52ce76184492b2aaff3060f486ca45f45
Signed-off-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1699893
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Diffstat (limited to 'cts')
| -rw-r--r-- | cts/i2c/dut.c | 20 |
1 files changed, 13 insertions, 7 deletions
diff --git a/cts/i2c/dut.c b/cts/i2c/dut.c index e4a87f440e..033aca7ffc 100644 --- a/cts/i2c/dut.c +++ b/cts/i2c/dut.c @@ -13,25 +13,28 @@ #include "uart.h" #include "watchdog.h" -#define TH_ADDR 0x3c +#define TH_ADDR__7bf 0x1e enum cts_rc write8_test(void) { - if (i2c_write8(i2c_ports[0].port, TH_ADDR, WRITE8_OFF, WRITE8_DATA)) + if (i2c_write8__7bf(i2c_ports[0].port, TH_ADDR__7bf, + WRITE8_OFF, WRITE8_DATA)) return CTS_RC_FAILURE; return CTS_RC_SUCCESS; } enum cts_rc write16_test(void) { - if (i2c_write16(i2c_ports[0].port, TH_ADDR, WRITE16_OFF, WRITE16_DATA)) + if (i2c_write16__7bf(i2c_ports[0].port, TH_ADDR__7bf, + WRITE16_OFF, WRITE16_DATA)) return CTS_RC_FAILURE; return CTS_RC_SUCCESS; } enum cts_rc write32_test(void) { - if (i2c_write32(i2c_ports[0].port, TH_ADDR, WRITE32_OFF, WRITE32_DATA)) + if (i2c_write32__7bf(i2c_ports[0].port, TH_ADDR__7bf, + WRITE32_OFF, WRITE32_DATA)) return CTS_RC_FAILURE; return CTS_RC_SUCCESS; } @@ -40,7 +43,8 @@ enum cts_rc read8_test(void) { int data; - if (i2c_read8(i2c_ports[0].port, TH_ADDR, READ8_OFF, &data)) + if (i2c_read8__7bf(i2c_ports[0].port, TH_ADDR__7bf, + READ8_OFF, &data)) return CTS_RC_FAILURE; if (data != READ8_DATA) { CPRINTL("Expecting 0x%x but read 0x%x", READ8_DATA, data); @@ -54,7 +58,8 @@ enum cts_rc read16_test(void) { int data; - if (i2c_read16(i2c_ports[0].port, TH_ADDR, READ16_OFF, &data)) + if (i2c_read16__7bf(i2c_ports[0].port, TH_ADDR__7bf, + READ16_OFF, &data)) return CTS_RC_FAILURE; if (data != READ16_DATA) { CPRINTL("Expecting 0x%x but read 0x%x", READ16_DATA, data); @@ -68,7 +73,8 @@ enum cts_rc read32_test(void) { int data; - if (i2c_read32(i2c_ports[0].port, TH_ADDR, READ32_OFF, &data)) + if (i2c_read32__7bf(i2c_ports[0].port, TH_ADDR__7bf, + READ32_OFF, &data)) return CTS_RC_FAILURE; if (data != READ32_DATA) { CPRINTL("Read 0x%x expecting 0x%x", data, READ32_DATA); |