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| author | Tom Hughes <tomhughes@chromium.org> | 2021-01-26 10:38:55 -0800 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2021-01-28 16:38:57 +0000 |
| commit | 2f40b71b625bcd826fd0cb4a005985abef0b8903 (patch) | |
| tree | 1f67563e6de1dc64fd4d40bb50ea70d2a17d18a7 /docs/write_protection.md | |
| parent | 4e950b9fde9e5d7197d2558f7a36bc809e193a49 (diff) | |
| download | chrome-ec-2f40b71b625bcd826fd0cb4a005985abef0b8903.tar.gz | |
docs: Run mdformat on all .md files
BRANCH=none
BUG=b:178648877
TEST=view in gitiles
Signed-off-by: Tom Hughes <tomhughes@chromium.org>
Change-Id: I0ac5581ba7bc512234d40dbf34222422afa9c725
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2650551
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Diffstat (limited to 'docs/write_protection.md')
| -rw-r--r-- | docs/write_protection.md | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/docs/write_protection.md b/docs/write_protection.md index 95c4bb0476..a71b3d095a 100644 --- a/docs/write_protection.md +++ b/docs/write_protection.md @@ -41,7 +41,7 @@ firmware jumps to it. On modern Chrome OS devices, the Cr50 (aka GSC / TPM) provides a "hardware write protect" GPIO that is connected to the AP SPI flash, EC SPI flash, EEPROM, and FPMCU via a [GPIO][write_protect_gpio]. This "hardware write protect" can only -be disabled with [Servo] or [SuzyQ] (["CCD open"]) and corresponds to +be disabled with [Servo] or [SuzyQ](["CCD open"]) and corresponds to [`OverrideWP`] in ccd. Disabling this write protect disables it for everything connected to this signal. |