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author | Gwendal Grignou <gwendal@chromium.org> | 2018-03-29 11:23:57 -0700 |
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committer | chrome-bot <chrome-bot@chromium.org> | 2018-04-02 16:26:46 -0700 |
commit | 94eaba49b0166f7d1d7f5356f4b5c21468f419f1 (patch) | |
tree | fa3a8f588f0e01c98969cd61e4a20e90b5809871 /driver/accelgyro_lsm6dsm.h | |
parent | 7c0d2d02f65ba8caf01f753b98e06a74218f1303 (diff) | |
download | chrome-ec-94eaba49b0166f7d1d7f5356f4b5c21468f419f1.tar.gz |
driver: lsm6dsm: Fix ODR rate calculation
rate was wrong, but round up was saving us.
BUG=b:73546254
BRANCH=none
TEST=Check register is set correctly even when roundup is 0.
Change-Id: I4cf11291345ccfaacd1fc9942a3f112b460268c1
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/986917
Tested-by: Gwendal Grignou <gwendal@google.com>
Reviewed-by: Gwendal Grignou <gwendal@google.com>
Diffstat (limited to 'driver/accelgyro_lsm6dsm.h')
-rw-r--r-- | driver/accelgyro_lsm6dsm.h | 6 |
1 files changed, 2 insertions, 4 deletions
diff --git a/driver/accelgyro_lsm6dsm.h b/driver/accelgyro_lsm6dsm.h index 606e19153f..7f02baa02e 100644 --- a/driver/accelgyro_lsm6dsm.h +++ b/driver/accelgyro_lsm6dsm.h @@ -67,12 +67,10 @@ enum lsm6dsm_odr { #define LSM6DSM_ODR_MAX_VAL 416000 /* ODR reg value from selected data rate in mHz */ -#define LSM6DSM_ODR_TO_REG(_odr) \ - __fls(_odr / LSM6DSM_ODR_MIN_VAL) +#define LSM6DSM_ODR_TO_REG(_odr) (__fls(_odr / LSM6DSM_ODR_MIN_VAL) + 1) /* normalized ODR value from selected data rate in mHz */ -#define LSM6DSM_ODR_TO_NORMALIZE(_odr) \ - (LSM6DSM_ODR_MIN_VAL << __fls(_odr/LSM6DSM_ODR_MIN_VAL)) +#define LSM6DSM_REG_TO_ODR(_reg) (LSM6DSM_ODR_MIN_VAL << (_reg - 1)) /* Full Scale range value and gain for Acc */ #define LSM6DSM_FS_LIST_NUM 4 |