Merge remote-tracking branch cros/main into firmware-fpmcu-dartmonkey-releasefirmware-fpmcu-dartmonkey-release

Generated by: ./util/update_release_branch.py --board dartmonkey --relevant_paths_file
./util/fingerprint-relevant-paths.txt firmware-fpmcu-dartmonkey-release

Relevant changes:

git log --oneline 6c1587ca70..28712dae9d -- board/nocturne_fp
board/dartmonkey common/fpsensor docs/fingerprint driver/fingerprint
util/getversion.sh

ded9307b79 util/getversion.sh: Fix version when not in a git repo
956055e692 board: change Google USB vendor info
71b2ef709d Update license boilerplate text in source code files
33e11afda0 Revert "fpsensor: Build fpsensor source file with C++"
c8d0360723 fpsensor: Build fpsensor source file with C++
bc113abd53 fpsensor: Fix g++ compiler error
150a58a0dc fpsensor: Fix fp_set_sensor_mode return type
b33b5ce85b fpsensor: Remove nested designators for C++ compatibility
2e864b2539 tree-wide: const-ify argv for console commands
56d8b360f9 test: Add test for get ikm failure when seed not set
3a3d6c3690 test: Add test for fpsensor trivial key failure
233e6bbd08 fpsensor_crypto: Abstract calls to hmac_SHA256
0a041b285b docs/fingerprint: Typo correction
c03fab67e2 docs/fingerprint: Fix the path of fputils.py
0b5d4baf5a util/getversion.sh: Fix empty file list handling
6e128fe760 FPMCU dev board environment with Satlab
3eb29b6aa5 builtin: Move ssize_t to sys/types.h
345d62ebd1 docs/fingerprint: Update power numbers for latest dartmonkey release
c25ffdb316 common: Conditionally support printf %l and %i modifiers
9a3c514b45 test: Add a test to check if the debugger is connected
54e603413f Move standard library tests to their own file
43fa6b4bf8 docs/fingerprint: Update power numbers for latest bloonchipper release
25536f9a84 driver/fingerprint/fpc/bep/fpc_sensor_spi.c: Format with clang-format
4face99efd driver/fingerprint/fpc/libfp/fpc_sensor_pal.h: Format with clang-format
738de2b575 trng: Rename rand to trng_rand
14b8270edd docs/fingerprint: Update dragonclaw power numbers
0b268f93d1 driver/fingerprint/fpc/libfp/fpc_private.c: Format with clang-format
f80da163f2 driver/fingerprint/fpc/libfp/fpc_private.h: Format with clang-format
a0751778f4 board/nocturne_fp/ro_workarounds.c: Format with clang-format
5e9c85c9b1 driver/fingerprint/fpc/libfp/fpc_sensor_pal.c: Format with clang-format
c1f9dd3cf8 driver/fingerprint/fpc/libfp/fpc_bio_algorithm.h: Format with clang-format
eb1e1bed8d driver/fingerprint/fpc/libfp/fpc1145_private.h: Format with clang-format
6e7b611821 driver/fingerprint/fpc/bep/fpc_bio_algorithm.h: Format with clang-format
e0589cd5e2 driver/fingerprint/fpc/bep/fpc1035_private.h: Format with clang-format
58f0246dbe board/nocturne_fp/board_ro.c: Format with clang-format
7905e556a0 common/fpsensor/fpsensor_crypto.c: Format with clang-format
21289d170c driver/fingerprint/fpc/bep/fpc1025_private.h: Format with clang-format
98a20f937e common/fpsensor/fpsensor_state.c: Format with clang-format
a2d255d8af common/fpsensor/fpsensor.c: Format with clang-format
84e53a65da board/nocturne_fp/board.h: Format with clang-format
73055eeb3f driver/fingerprint/fpc/bep/fpc_private.c: Format with clang-format
0f7b5cb509 common/fpsensor/fpsensor_private.h: Format with clang-format
1ceade6e65 driver/fingerprint/fpc/bep/fpc_private.h: Format with clang-format
dca9d74321 Revert "trng: Rename rand to trng_rand"
a6b0b3554f trng: Rename rand to trng_rand
28d0b75b70 third_party/boringssl: Remove unused header

BRANCH=None
BUG=b:244387210 b:242720240 b:215613183 b:242720910 b:236386294
BUG=b:234181908 b:244781166 b:234781655 b:234143158 b:234181908
BUG=b:237344361 b:236025198 b:234181908 b:180945056 chromium:1098010
BUG=b:246424843 b:234181908 b:131913998
TEST=`make -j buildall`
TEST=./util/run_device_tests.py --board dartmonkey
     Test "aes": PASSED
     Test "cec": PASSED
     Test "cortexm_fpu": PASSED
     Test "crc": PASSED
     Test "flash_physical": PASSED
     Test "flash_write_protect": PASSED
     Test "fpsensor_hw": PASSED
     Test "fpsensor_spi_ro": PASSED
     Test "fpsensor_spi_rw": PASSED
     Test "fpsensor_uart_ro": PASSED
     Test "fpsensor_uart_rw": PASSED
     Test "mpu_ro": PASSED
     Test "mpu_rw": PASSED
     Test "mutex": PASSED
     Test "pingpong": PASSED
     Test "printf": PASSED
     Test "queue": PASSED
     Test "rollback_region0": PASSED
     Test "rollback_region1": PASSED
     Test "rollback_entropy": PASSED
     Test "rtc": PASSED
     Test "sha256": PASSED
     Test "sha256_unrolled": PASSED
     Test "static_if": PASSED
     Test "stdlib": PASSED
     Test "system_is_locked_wp_on": PASSED
     Test "system_is_locked_wp_off": PASSED
     Test "timer_dos": PASSED
     Test "utils": PASSED
     Test "utils_str": PASSED
     Test "panic_data_dartmonkey_v2.0.2887": PASSED
     Test "panic_data_nocturne_fp_v2.2.64": PASSED
     Test "panic_data_nami_fp_v2.2.144": PASSED
Force-Relevant-Builds: all
Signed-off-by: Tom Hughes <tomhughes@chromium.org>

Change-Id: I2c312583a709fedae8fe11d92c22328c3b634bc7

1 files changed, 94 insertions, 95 deletions

diff --git a/driver/charger/bq24715.h b/driver/charger/bq24715.h
index 644f995f2e..905cdf47be 100644
--- a/driver/charger/bq24715.h
+++ b/driver/charger/bq24715.h
@@ -1,4 +1,4 @@
-/* Copyright 2012 The Chromium OS Authors. All rights reserved.
+/* Copyright 2012 The ChromiumOS Authors
  * Use of this source code is governed by a BSD-style license that can be
  * found in the LICENSE file.
  *
@@ -14,118 +14,117 @@
  */
 
 /* Chip specific registers */
-#define BQ24715_CHARGE_OPTION           0x12
-#define BQ24715_CHARGE_CURRENT          0x14
-#define BQ24715_MAX_CHARGE_VOLTAGE      0x15
-#define BQ24715_MIN_SYSTEM_VOLTAGE      0x3e
-#define BQ24715_INPUT_CURRENT           0x3f
-#define BQ24715_MANUFACTURER_ID         0xfe
-#define BQ24715_DEVICE_ID               0xff
+#define BQ24715_CHARGE_OPTION 0x12
+#define BQ24715_CHARGE_CURRENT 0x14
+#define BQ24715_MAX_CHARGE_VOLTAGE 0x15
+#define BQ24715_MIN_SYSTEM_VOLTAGE 0x3e
+#define BQ24715_INPUT_CURRENT 0x3f
+#define BQ24715_MANUFACTURER_ID 0xfe
+#define BQ24715_DEVICE_ID 0xff
 
 /* ChargeOption Register - 0x12 */
-#define OPT_LOWPOWER_MASK               BIT(15)
-#define   OPT_LOWPOWER_DSCHRG_I_MON_ON    (0 << 15)
-#define   OPT_LOWPOWER_DSCHRG_I_MON_OFF   BIT(15)
-#define OPT_WATCHDOG_MASK               (3 << 13)
-#define   OPT_WATCHDOG_DISABLE            (0 << 13)
-#define   OPT_WATCHDOG_44SEC              BIT(13)
-#define   OPT_WATCHDOG_88SEC              (2 << 13)
-#define   OPT_WATCHDOG_175SEC             (3 << 13)
-#define OPT_SYSOVP_MASK                 BIT(12)
-#define   OPT_SYSOVP_15P1_3SEC_10P1_2SEC  (0 << 12)
-#define   OPT_SYSOVP_17P0_3SEC_11P3_2SEC  BIT(12)
-#define OPT_SYSOVP_STATUS_MASK          BIT(11)
-#define   OPT_SYSOVP_STATUS               BIT(11)
-#define OPT_AUDIO_FREQ_LIMIT_MASK       BIT(10)
-#define   OPT_AUDIO_FREQ_NO_LIMIT         (0 << 10)
-#define   OPT_AUDIO_FREQ_40KHZ_LIMIT      BIT(10)
-#define OPT_SWITCH_FREQ_MASK            (3 << 8)
-#define   OPT_SWITCH_FREQ_600KHZ          (0 << 8)
-#define   OPT_SWITCH_FREQ_800KHZ          BIT(8)
-#define   OPT_SWITCH_FREQ_1MHZ            (2 << 8)
-#define   OPT_SWITCH_FREQ_800KHZ_DUP      (3 << 8)
-#define OPT_ACOC_MASK                   BIT(7)
-#define   OPT_ACOC_DISABLED               (0 << 7)
-#define   OPT_ACOC_333PCT_IPDM            BIT(7)
-#define OPT_LSFET_OCP_MASK              BIT(6)
-#define   OPT_LSFET_OCP_250MV             (0 << 6)
-#define   OPT_LSFET_OCP_350MV             BIT(6)
-#define OPT_LEARN_MASK                  BIT(5)
-#define   OPT_LEARN_DISABLE               (0 << 5)
-#define   OPT_LEARN_ENABLE                BIT(5)
-#define OPT_IOUT_MASK                   BIT(4)
-#define   OPT_IOUT_40X                    (0 << 4)
-#define   OPT_IOUT_16X                    BIT(4)
-#define OPT_FIX_IOUT_MASK               BIT(3)
-#define   OPT_FIX_IOUT_IDPM_EN            (0 << 3)
-#define   OPT_FIX_IOUT_ALWAYS             BIT(3)
-#define OPT_LDO_MODE_MASK               BIT(2)
-#define   OPT_LDO_DISABLE                 (0 << 2)
-#define   OPT_LDO_ENABLE                  BIT(2)
-#define OPT_IDPM_MASK                   BIT(1)
-#define   OPT_IDPM_DISABLE                (0 << 1)
-#define   OPT_IDPM_ENABLE                 BIT(1)
-#define OPT_CHARGE_INHIBIT_MASK         BIT(0)
-#define   OPT_CHARGE_ENABLE               (0 << 0)
-#define   OPT_CHARGE_DISABLE              BIT(0)
-
+#define OPT_LOWPOWER_MASK BIT(15)
+#define OPT_LOWPOWER_DSCHRG_I_MON_ON (0 << 15)
+#define OPT_LOWPOWER_DSCHRG_I_MON_OFF BIT(15)
+#define OPT_WATCHDOG_MASK (3 << 13)
+#define OPT_WATCHDOG_DISABLE (0 << 13)
+#define OPT_WATCHDOG_44SEC BIT(13)
+#define OPT_WATCHDOG_88SEC (2 << 13)
+#define OPT_WATCHDOG_175SEC (3 << 13)
+#define OPT_SYSOVP_MASK BIT(12)
+#define OPT_SYSOVP_15P1_3SEC_10P1_2SEC (0 << 12)
+#define OPT_SYSOVP_17P0_3SEC_11P3_2SEC BIT(12)
+#define OPT_SYSOVP_STATUS_MASK BIT(11)
+#define OPT_SYSOVP_STATUS BIT(11)
+#define OPT_AUDIO_FREQ_LIMIT_MASK BIT(10)
+#define OPT_AUDIO_FREQ_NO_LIMIT (0 << 10)
+#define OPT_AUDIO_FREQ_40KHZ_LIMIT BIT(10)
+#define OPT_SWITCH_FREQ_MASK (3 << 8)
+#define OPT_SWITCH_FREQ_600KHZ (0 << 8)
+#define OPT_SWITCH_FREQ_800KHZ BIT(8)
+#define OPT_SWITCH_FREQ_1MHZ (2 << 8)
+#define OPT_SWITCH_FREQ_800KHZ_DUP (3 << 8)
+#define OPT_ACOC_MASK BIT(7)
+#define OPT_ACOC_DISABLED (0 << 7)
+#define OPT_ACOC_333PCT_IPDM BIT(7)
+#define OPT_LSFET_OCP_MASK BIT(6)
+#define OPT_LSFET_OCP_250MV (0 << 6)
+#define OPT_LSFET_OCP_350MV BIT(6)
+#define OPT_LEARN_MASK BIT(5)
+#define OPT_LEARN_DISABLE (0 << 5)
+#define OPT_LEARN_ENABLE BIT(5)
+#define OPT_IOUT_MASK BIT(4)
+#define OPT_IOUT_40X (0 << 4)
+#define OPT_IOUT_16X BIT(4)
+#define OPT_FIX_IOUT_MASK BIT(3)
+#define OPT_FIX_IOUT_IDPM_EN (0 << 3)
+#define OPT_FIX_IOUT_ALWAYS BIT(3)
+#define OPT_LDO_MODE_MASK BIT(2)
+#define OPT_LDO_DISABLE (0 << 2)
+#define OPT_LDO_ENABLE BIT(2)
+#define OPT_IDPM_MASK BIT(1)
+#define OPT_IDPM_DISABLE (0 << 1)
+#define OPT_IDPM_ENABLE BIT(1)
+#define OPT_CHARGE_INHIBIT_MASK BIT(0)
+#define OPT_CHARGE_ENABLE (0 << 0)
+#define OPT_CHARGE_DISABLE BIT(0)
 
 /* ChargeCurrent Register - 0x14
  * The ChargeCurrent register controls a DAC. Therefore
  * the below definitions are cummulative. */
-#define CHARGE_I_64MA                   BIT(6)
-#define CHARGE_I_128MA                  BIT(7)
-#define CHARGE_I_256MA                  BIT(8)
-#define CHARGE_I_512MA                  BIT(9)
-#define CHARGE_I_1024MA                 BIT(10)
-#define CHARGE_I_2048MA                 BIT(11)
-#define CHARGE_I_4096MA                 BIT(12)
-#define CHARGE_I_OFF                    (0)
-#define CHARGE_I_MIN                    (128)
-#define CHARGE_I_MAX                    (8128)
-#define CHARGE_I_STEP                   (64)
+#define CHARGE_I_64MA BIT(6)
+#define CHARGE_I_128MA BIT(7)
+#define CHARGE_I_256MA BIT(8)
+#define CHARGE_I_512MA BIT(9)
+#define CHARGE_I_1024MA BIT(10)
+#define CHARGE_I_2048MA BIT(11)
+#define CHARGE_I_4096MA BIT(12)
+#define CHARGE_I_OFF (0)
+#define CHARGE_I_MIN (128)
+#define CHARGE_I_MAX (8128)
+#define CHARGE_I_STEP (64)
 
 /* MaxChargeVoltage Register - 0x15
  * The MaxChargeVoltage register controls a DAC. Therefore
  * the below definitions are cummulative. */
-#define CHARGE_V_16MV                   BIT(4)
-#define CHARGE_V_32MV                   BIT(5)
-#define CHARGE_V_64MV                   BIT(6)
-#define CHARGE_V_128MV                  BIT(7)
-#define CHARGE_V_256MV                  BIT(8)
-#define CHARGE_V_512MV                  BIT(9)
-#define CHARGE_V_1024MV                 BIT(10)
-#define CHARGE_V_2048MV                 BIT(11)
-#define CHARGE_V_4096MV                 BIT(12)
-#define CHARGE_V_8192MV                 BIT(13)
-#define CHARGE_V_MIN                    (4096)
-#define CHARGE_V_MAX                    (0x3ff0)
-#define CHARGE_V_STEP                   (16)
+#define CHARGE_V_16MV BIT(4)
+#define CHARGE_V_32MV BIT(5)
+#define CHARGE_V_64MV BIT(6)
+#define CHARGE_V_128MV BIT(7)
+#define CHARGE_V_256MV BIT(8)
+#define CHARGE_V_512MV BIT(9)
+#define CHARGE_V_1024MV BIT(10)
+#define CHARGE_V_2048MV BIT(11)
+#define CHARGE_V_4096MV BIT(12)
+#define CHARGE_V_8192MV BIT(13)
+#define CHARGE_V_MIN (4096)
+#define CHARGE_V_MAX (0x3ff0)
+#define CHARGE_V_STEP (16)
 
 /* MinSystemVoltage Register - 0x3e
  * The MinSystemVoltage register controls a DAC. Therefore
  * the below definitions are cummulative. */
-#define MIN_SYS_V_256MV                 BIT(8)
-#define MIN_SYS_V_512MV                 BIT(9)
-#define MIN_SYS_V_1024MV                BIT(10)
-#define MIN_SYS_V_2048MV                BIT(11)
-#define MIN_SYS_V_4096MV                BIT(12)
-#define MIN_SYS_V_8192MV                BIT(13)
-#define MIN_SYS_V_MIN                   (4096)
+#define MIN_SYS_V_256MV BIT(8)
+#define MIN_SYS_V_512MV BIT(9)
+#define MIN_SYS_V_1024MV BIT(10)
+#define MIN_SYS_V_2048MV BIT(11)
+#define MIN_SYS_V_4096MV BIT(12)
+#define MIN_SYS_V_8192MV BIT(13)
+#define MIN_SYS_V_MIN (4096)
 
 /* InputCurrent Register - 0x3f
  * The InputCurrent register controls a DAC. Therefore
  * the below definitions are cummulative. */
-#define INPUT_I_64MA                   BIT(6)
-#define INPUT_I_128MA                  BIT(7)
-#define INPUT_I_256MA                  BIT(8)
-#define INPUT_I_512MA                  BIT(9)
-#define INPUT_I_1024MA                 BIT(10)
-#define INPUT_I_2048MA                 BIT(11)
-#define INPUT_I_4096MA                 BIT(12)
-#define INPUT_I_MIN                    (128)
-#define INPUT_I_MAX                    (8064)
-#define INPUT_I_STEP                   (64)
+#define INPUT_I_64MA BIT(6)
+#define INPUT_I_128MA BIT(7)
+#define INPUT_I_256MA BIT(8)
+#define INPUT_I_512MA BIT(9)
+#define INPUT_I_1024MA BIT(10)
+#define INPUT_I_2048MA BIT(11)
+#define INPUT_I_4096MA BIT(12)
+#define INPUT_I_MIN (128)
+#define INPUT_I_MAX (8064)
+#define INPUT_I_STEP (64)
 
 extern const struct charger_drv bq24715_drv;