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| author | Randall Spangler <rspangler@chromium.org> | 2013-10-17 15:05:04 -0700 |
|---|---|---|
| committer | chrome-internal-fetch <chrome-internal-fetch@google.com> | 2013-10-23 21:27:40 +0000 |
| commit | 2ad076f8a02c8a3165a76dfb093cefd79fdbfc67 (patch) | |
| tree | 13f9d0505f564f07c9867aabf11b7083613666d4 /driver/charger/bq24715.h | |
| parent | 8cf03ac0563294fbdeca2dc133d06f0b51c9a546 (diff) | |
| download | chrome-ec-2ad076f8a02c8a3165a76dfb093cefd79fdbfc67.tar.gz | |
cleanup: Rename and move header files
Device-specific headers belong in driver/ or chip/. The include/
directory should be for common interfaces.
Code should not normally need to include driver-specific headers. If
it does, it should use the full relative path from the EC project root
(for example, drivers/charger/bq24715.h).
Change-Id: Id23db37a431e2d802a74ec601db6f69b613352ba
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/173746
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Diffstat (limited to 'driver/charger/bq24715.h')
| -rw-r--r-- | driver/charger/bq24715.h | 130 |
1 files changed, 130 insertions, 0 deletions
diff --git a/driver/charger/bq24715.h b/driver/charger/bq24715.h new file mode 100644 index 0000000000..1c3df77725 --- /dev/null +++ b/driver/charger/bq24715.h @@ -0,0 +1,130 @@ +/* Copyright (c) 2012 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + * + * TI bq24715 battery charger driver. + */ + +#ifndef __CROS_EC_CHARGER_BQ24715_H +#define __CROS_EC_CHARGER_BQ24715_H + +/* NOTES: + * If battery is not present keep charge current register (0x14) at 0. + * Max charge voltage (0x15) needs to be programmed before 0x14. + */ + +/* Chip specific registers */ +#define BQ24715_CHARGE_OPTION 0x12 +#define BQ24715_CHARGE_CURRENT 0x14 +#define BQ24715_MAX_CHARGE_VOLTAGE 0x15 +#define BQ24715_MIN_SYSTEM_VOLTAGE 0x3e +#define BQ24715_INPUT_CURRENT 0x3f +#define BQ24715_MANUFACTURER_ID 0xfe +#define BQ24715_DEVICE_ID 0xff + +/* ChargeOption Register - 0x12 */ +#define OPT_LOWPOWER_MASK (1 << 15) +#define OPT_LOWPOWER_DSCHRG_I_MON_ON (0 << 15) +#define OPT_LOWPOWER_DSCHRG_I_MON_OFF (1 << 15) +#define OPT_WATCHDOG_MASK (3 << 13) +#define OPT_WATCHDOG_DISABLE (0 << 13) +#define OPT_WATCHDOG_44SEC (1 << 13) +#define OPT_WATCHDOG_88SEC (2 << 13) +#define OPT_WATCHDOG_175SEC (3 << 13) +#define OPT_SYSOVP_MASK (1 << 12) +#define OPT_SYSOVP_15P1_3SEC_10P1_2SEC (0 << 12) +#define OPT_SYSOVP_17P0_3SEC_11P3_2SEC (1 << 12) +#define OPT_SYSOVP_STATUS_MASK (1 << 11) +#define OPT_SYSOVP_STATUS (1 << 11) +#define OPT_AUDIO_FREQ_LIMIT_MASK (1 << 10) +#define OPT_AUDIO_FREQ_NO_LIMIT (0 << 10) +#define OPT_AUDIO_FREQ_40KHZ_LIMIT (1 << 10) +#define OPT_SWITCH_FREQ_MASK (3 << 8) +#define OPT_SWITCH_FREQ_600KHZ (0 << 8) +#define OPT_SWITCH_FREQ_800KHZ (1 << 8) +#define OPT_SWITCH_FREQ_1MHZ (2 << 8) +#define OPT_SWITCH_FREQ_800KHZ_DUP (3 << 8) +#define OPT_ACOC_MASK (1 << 7) +#define OPT_ACOC_DISABLED (0 << 7) +#define OPT_ACOC_333PCT_IPDM (1 << 7) +#define OPT_LSFET_OCP_MASK (1 << 6) +#define OPT_LSFET_OCP_250MV (0 << 6) +#define OPT_LSFET_OCP_350MV (1 << 6) +#define OPT_LEARN_MASK (1 << 5) +#define OPT_LEARN_DISABLE (0 << 5) +#define OPT_LEARN_ENABLE (1 << 5) +#define OPT_IOUT_MASK (1 << 4) +#define OPT_IOUT_40X (0 << 4) +#define OPT_IOUT_16X (1 << 4) +#define OPT_FIX_IOUT_MASK (1 << 3) +#define OPT_FIX_IOUT_IDPM_EN (0 << 3) +#define OPT_FIX_IOUT_ALWAYS (1 << 3) +#define OPT_LDO_MODE_MASK (1 << 2) +#define OPT_LDO_DISABLE (0 << 2) +#define OPT_LDO_ENABLE (1 << 2) +#define OPT_ODPM_MASK (1 << 1) +#define OPT_ODPM_DISABLE (0 << 1) +#define OPT_ODPM_ENABLE (1 << 1) +#define OPT_CHARGE_INHIBIT_MASK (1 << 0) +#define OPT_CHARGE_ENABLE (0 << 0) +#define OPT_CHARGE_DISABLE (1 << 0) + + +/* ChargeCurrent Register - 0x14 + * The ChargeCurrent register controls a DAC. Therefore + * the below definitions are cummulative. */ +#define CHARGE_I_64MA (1 << 6) +#define CHARGE_I_128MA (1 << 7) +#define CHARGE_I_256MA (1 << 8) +#define CHARGE_I_512MA (1 << 9) +#define CHARGE_I_1024MA (1 << 10) +#define CHARGE_I_2048MA (1 << 11) +#define CHARGE_I_4096MA (1 << 12) +#define CHARGE_I_OFF (0) +#define CHARGE_I_MIN (128) +#define CHARGE_I_MAX (8128) +#define CHARGE_I_STEP (64) + +/* MaxChargeVoltage Register - 0x15 + * The MaxChargeVoltage register controls a DAC. Therefore + * the below definitions are cummulative. */ +#define CHARGE_V_16MV (1 << 4) +#define CHARGE_V_32MV (1 << 5) +#define CHARGE_V_64MV (1 << 6) +#define CHARGE_V_128MV (1 << 7) +#define CHARGE_V_256MV (1 << 8) +#define CHARGE_V_512MV (1 << 9) +#define CHARGE_V_1024MV (1 << 10) +#define CHARGE_V_2048MV (1 << 11) +#define CHARGE_V_4096MV (1 << 12) +#define CHARGE_V_8192MV (1 << 13) +#define CHARGE_V_MIN (4096) +#define CHARGE_V_MAX (0x3ff0) +#define CHARGE_V_STEP (16) + +/* MinSystemVoltage Register - 0x3e + * The MinSystemVoltage register controls a DAC. Therefore + * the below definitions are cummulative. */ +#define MIN_SYS_V_256MV (1 << 8) +#define MIN_SYS_V_512MV (1 << 9) +#define MIN_SYS_V_1024MV (1 << 10) +#define MIN_SYS_V_2048MV (1 << 11) +#define MIN_SYS_V_4096MV (1 << 12) +#define MIN_SYS_V_8192MV (1 << 13) +#define MIN_SYS_V_MIN (4096) + +/* InputCurrent Register - 0x3f + * The InputCurrent register controls a DAC. Therefore + * the below definitions are cummulative. */ +#define INPUT_I_64MA (1 << 6) +#define INPUT_I_128MA (1 << 7) +#define INPUT_I_256MA (1 << 8) +#define INPUT_I_512MA (1 << 9) +#define INPUT_I_1024MA (1 << 10) +#define INPUT_I_2048MA (1 << 11) +#define INPUT_I_4096MA (1 << 12) +#define INPUT_I_MIN (128) +#define INPUT_I_MAX (8064) +#define INPUT_I_STEP (64) + +#endif /* __CROS_EC_CHARGER_BQ24715_H */ |