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| author | Allen Chiang <allen_chiang@mediatek.corp-partner.google.com> | 2019-12-30 11:08:37 +0800 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2020-01-14 04:54:32 +0000 |
| commit | 99802b421dc0b987063b09cc16a4cf41eefc90e2 (patch) | |
| tree | 8256b20d862a92012e53c407d21cacb0b435d63e /driver/charger/rt946x.h | |
| parent | c75bc93c31bf9ecbe2b8f39193e949440ec962c7 (diff) | |
| download | chrome-ec-99802b421dc0b987063b09cc16a4cf41eefc90e2.tar.gz | |
rt946x: reduce DB and BL driving capacity
1. In order to pass Backlight EMC RE test,
we enter test mode to reduce DB and BL driving capacity on MT6370.
BRANCH=kukui
BUG=b:146917398
TEST=none, Bitland tested pass.
Change-Id: If24a3e81305fc8b3a7d8ede7684cc634074014a0
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1984141
Reviewed-by: Ting Shen <phoenixshen@chromium.org>
Reviewed-by: Eric Yilun Lin <yllin@chromium.org>
Tested-by: Xiong Huang <xiong.huang@bitland.corp-partner.google.com>
Commit-Queue: Allen Chiang <allen_chiang@mediatek.corp-partner.google.com>
Diffstat (limited to 'driver/charger/rt946x.h')
| -rw-r--r-- | driver/charger/rt946x.h | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/driver/charger/rt946x.h b/driver/charger/rt946x.h index c672622080..7c4d75ff74 100644 --- a/driver/charger/rt946x.h +++ b/driver/charger/rt946x.h @@ -200,6 +200,11 @@ #define MT6370_REG_RGBMASK 0xED #define MT6370_REG_BLMASK 0xEE #define MT6370_REG_DBMASK 0xEF +#define MT6370_REG_TM_PAS_CODE1 0xF0 +#define MT6370_REG_BANK 0xFF +/* TM REGISTER */ +#define MT6370_TM_REG_BL3 0x34 +#define MT6370_TM_REG_DSV1 0x37 #else #error "No suitable charger option defined" #endif @@ -648,6 +653,20 @@ #define MT6370_MASK_CHG_VBATOV_STAT BIT(MT6370_SHIFT_CHG_VBATOV_STAT) #endif +/* ========== TM PAS CODE1 0xF0 (mt6370) ============ */ +#define MT6370_LEAVE_TM 0x00 + +/* ========== BANK REG 0xFF (mt6370) ============ */ +#define MT6370_MASK_REG_TM 0x69 + +/* ========== TM REG 0x34 (mt6370) ============ */ +#define MT6370_TM_MASK_BL3_SL 0xC0 +#define MT6370_TM_REDUCE_BL3_SL 0xC0 + +/* ========== TM REG 0x37 (mt6370) ============ */ +#define MT6370_TM_MASK_DSV1_SL 0xC0 +#define MT6370_TM_REDUCE_DSV1_SL 0x00 + /* ADC unit/offset */ #define MT6370_ADC_UNIT_VBUS_DIV5 25000 /* uV */ #define MT6370_ADC_UNIT_VBUS_DIV2 10000 /* uV */ @@ -830,6 +849,9 @@ int mt6370_led_set_pwm_dim_duty(enum mt6370_led_index index, uint8_t dim_duty); /* Set LED PWM mode frequency */ int mt6370_led_set_pwm_frequency(enum mt6370_led_index index, enum mt6370_led_pwm_freq freq); + +/* Reduce mt6370 DB and BL driving capacity */ +int mt6370_reduce_db_bl_driving(void); #endif #endif /* __CROS_EC_RT946X_H */ |