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| author | udaykiran <udaykiran@google.com> | 2021-05-27 18:10:10 -0700 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2021-07-27 06:57:47 +0000 |
| commit | 9694458b3be38ff440067b263c768007bb3223b5 (patch) | |
| tree | 5b10f3b2fe5d0e118cb1e91b7b6b620ac41fe839 /driver/charger/sm5803.h | |
| parent | 974ab1bdc2bdd737dfd7faa13edbbabeb62361fb (diff) | |
| download | chrome-ec-9694458b3be38ff440067b263c768007bb3223b5.tar.gz | |
SM5803A: Handle OVP_VBAT in charging
One of the boards under test having charging process interrupted due to
early triggering of SM5803A battery over voltage comparator (OVP_VBAT).
Programmed OVP_VBAT comparator has +/-5% setpoint accuracy. Current
setpoint was 9.2V. so the possible triggering range is from 8.74V to
9.66V. In order to avoid this issue OVP_VBAT was set to new setpoint
and simultaneously setting GPADC threshold to 9V. VBAT_SENSP high
interrupt is configured. When this interrupt happens battery charge is
disabled.
Although this issue only found for 2S batteries this tolerance range can
possibly effect 3S batteries too.
BUG=b:182373694
BRANCH=dedede
TEST=Fix was verified by Silicon Mitus.
Signed-off-by: udaykiran <udaykiran@google.com>
Change-Id: Ibc7bb51af56ec9d8ef8d27b58cdab9c59a03ae87
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2927935
Reviewed-by: Diana Z <dzigterman@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Diffstat (limited to 'driver/charger/sm5803.h')
| -rw-r--r-- | driver/charger/sm5803.h | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/driver/charger/sm5803.h b/driver/charger/sm5803.h index e1a3e10560..b7638411e4 100644 --- a/driver/charger/sm5803.h +++ b/driver/charger/sm5803.h @@ -95,6 +95,9 @@ #define SM5803_GPIO0_OPEN_DRAIN_EN BIT(6) #define SM5803_CHG_DET_OPEN_DRAIN_EN BIT(7) +#define SM5803_REG_VBATSNSP_MEAS_MSB 0x40 +#define SM5803_REG_VBATSNSP_MEAS_LSB 0x41 + enum sm5803_gpio0_modes { GPIO0_MODE_PROCHOT, GPIO0_MODE_OUTPUT, @@ -133,6 +136,7 @@ enum sm5803_gpio0_modes { /* Note: Threshold registers all assume lower 2 bits are 0 */ #define SM5803_REG_VBUS_LOW_TH 0x1A +#define SM5803_REG_VBATSNSP_MAX_TH 0x26 #define SM5803_REG_VBUS_HIGH_TH 0x2A #define SM5803_REG_VCHG_PWR_LOW_TH 0x1B #define SM5803_REG_VCHG_PWR_HIGH_TH 0x2B @@ -146,6 +150,8 @@ enum sm5803_gpio0_modes { #define SM5803_VBUS_LOW_LEVEL 0x25 #define SM5803_VBUS_HIGH_LEVEL 0x2C + + /* * TINT thresholds. TINT steps are in 0.43 K with the upper threshold set to * 360 K and lower threshold to de-assert PROCHOT at 330 K. @@ -156,6 +162,22 @@ enum sm5803_gpio0_modes { #define SM5803_TINT_MAX_LEVEL 0xFF #define SM5803_TINT_MIN_LEVEL 0x00 +/* + * Set minimum thresholds for VBUS_PWR_LOW_TH interrupt generation + * 2S battery 9.4v + * 3S battery 14.1V VBUS_PWR MIN TH + */ +#define SM5803_VBAT_PWR_MINTH_3S_LEVEL 0x9B +#define SM5803_VBAT_PWR_MINTH_2S_LEVEL 0x9B + +/* + * Set thresholds for VBATSNSP_MAX_TH GPADC interrupt generation + * 2S battery 9v + * 3S battery 13.3V + */ +#define SM5803_VBAT_SNSP_MAXTH_3S_LEVEL 0xD8 +#define SM5803_VBAT_SNSP_MAXTH_2S_LEVEL 0xDC + /* IBAT levels - The IBAT levels increment in 7.32mA */ #define SM5803_REG_IBAT_CHG_MEAS_MSB 0x44 #define SM5803_REG_IBAT_CHG_MEAS_LSB 0x45 |