diff options
author | Tom Hughes <tomhughes@chromium.org> | 2022-09-21 14:10:01 -0700 |
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committer | Tom Hughes <tomhughes@chromium.org> | 2022-09-22 12:49:33 -0700 |
commit | 2bcf863b492fe7ed8105c853814dba6ed32ba719 (patch) | |
tree | fcf6ce5810f9ff9e3c8cce434812dd75492269ed /driver/ioexpander/it8801.h | |
parent | e5fb0b9ba488614b5684e640530f00821ab7b943 (diff) | |
parent | 28712dae9d7ed1e694f7622cc083afa71090d4d5 (diff) | |
download | chrome-ec-2bcf863b492fe7ed8105c853814dba6ed32ba719.tar.gz |
Merge remote-tracking branch cros/main into firmware-fpmcu-bloonchipper-releasefirmware-fpmcu-bloonchipper-release
Generated by: ./util/update_release_branch.py --board bloonchipper
--relevant_paths_file ./util/fingerprint-relevant-paths.txt firmware-
fpmcu-bloonchipper-release
Relevant changes:
git log --oneline e5fb0b9ba4..28712dae9d -- board/hatch_fp
board/bloonchipper common/fpsensor docs/fingerprint driver/fingerprint
util/getversion.sh
ded9307b79 util/getversion.sh: Fix version when not in a git repo
956055e692 board: change Google USB vendor info
71b2ef709d Update license boilerplate text in source code files
33e11afda0 Revert "fpsensor: Build fpsensor source file with C++"
c8d0360723 fpsensor: Build fpsensor source file with C++
bc113abd53 fpsensor: Fix g++ compiler error
150a58a0dc fpsensor: Fix fp_set_sensor_mode return type
b33b5ce85b fpsensor: Remove nested designators for C++ compatibility
2e864b2539 tree-wide: const-ify argv for console commands
56d8b360f9 test: Add test for get ikm failure when seed not set
3a3d6c3690 test: Add test for fpsensor trivial key failure
233e6bbd08 fpsensor_crypto: Abstract calls to hmac_SHA256
0a041b285b docs/fingerprint: Typo correction
c03fab67e2 docs/fingerprint: Fix the path of fputils.py
0b5d4baf5a util/getversion.sh: Fix empty file list handling
6e128fe760 FPMCU dev board environment with Satlab
3eb29b6aa5 builtin: Move ssize_t to sys/types.h
345d62ebd1 docs/fingerprint: Update power numbers for latest dartmonkey release
c25ffdb316 common: Conditionally support printf %l and %i modifiers
9a3c514b45 test: Add a test to check if the debugger is connected
54e603413f Move standard library tests to their own file
43fa6b4bf8 docs/fingerprint: Update power numbers for latest bloonchipper release
25536f9a84 driver/fingerprint/fpc/bep/fpc_sensor_spi.c: Format with clang-format
4face99efd driver/fingerprint/fpc/libfp/fpc_sensor_pal.h: Format with clang-format
738de2b575 trng: Rename rand to trng_rand
14b8270edd docs/fingerprint: Update dragonclaw power numbers
0b268f93d1 driver/fingerprint/fpc/libfp/fpc_private.c: Format with clang-format
f80da163f2 driver/fingerprint/fpc/libfp/fpc_private.h: Format with clang-format
5e9c85c9b1 driver/fingerprint/fpc/libfp/fpc_sensor_pal.c: Format with clang-format
c1f9dd3cf8 driver/fingerprint/fpc/libfp/fpc_bio_algorithm.h: Format with clang-format
eb1e1bed8d driver/fingerprint/fpc/libfp/fpc1145_private.h: Format with clang-format
6e7b611821 driver/fingerprint/fpc/bep/fpc_bio_algorithm.h: Format with clang-format
e0589cd5e2 driver/fingerprint/fpc/bep/fpc1035_private.h: Format with clang-format
7905e556a0 common/fpsensor/fpsensor_crypto.c: Format with clang-format
21289d170c driver/fingerprint/fpc/bep/fpc1025_private.h: Format with clang-format
98a20f937e common/fpsensor/fpsensor_state.c: Format with clang-format
a2d255d8af common/fpsensor/fpsensor.c: Format with clang-format
73055eeb3f driver/fingerprint/fpc/bep/fpc_private.c: Format with clang-format
0f7b5cb509 common/fpsensor/fpsensor_private.h: Format with clang-format
1ceade6e65 driver/fingerprint/fpc/bep/fpc_private.h: Format with clang-format
dc3e9008b8 board/hatch_fp/board.h: Format with clang-format
dca9d74321 Revert "trng: Rename rand to trng_rand"
a6b0b3554f trng: Rename rand to trng_rand
28d0b75b70 third_party/boringssl: Remove unused header
BRANCH=None
BUG=b:246424843 b:234181908 b:244781166 b:234181908 b:244387210
BUG=b:242720240 chromium:1098010 b:180945056 b:236025198 b:234181908
BUG=b:234181908 b:237344361 b:131913998 b:236386294 b:234143158
BUG=b:234781655 b:215613183 b:242720910
TEST=`make -j buildall`
TEST=./test/run_device_tests.py --board bloonchipper
Test "aes": PASSED
Test "cec": PASSED
Test "cortexm_fpu": PASSED
Test "crc": PASSED
Test "flash_physical": PASSED
Test "flash_write_protect": PASSED
Test "fpsensor_hw": PASSED
Test "fpsensor_spi_ro": PASSED
Test "fpsensor_spi_rw": PASSED
Test "fpsensor_uart_ro": PASSED
Test "fpsensor_uart_rw": PASSED
Test "mpu_ro": PASSED
Test "mpu_rw": PASSED
Test "mutex": PASSED
Test "pingpong": PASSED
Test "printf": PASSED
Test "queue": PASSED
Test "rollback_region0": PASSED
Test "rollback_region1": PASSED
Test "rollback_entropy": PASSED
Test "rtc": PASSED
Test "sha256": PASSED
Test "sha256_unrolled": PASSED
Test "static_if": PASSED
Test "stdlib": PASSED
Test "system_is_locked_wp_on": PASSED
Test "system_is_locked_wp_off": PASSED
Test "timer_dos": PASSED
Test "utils": PASSED
Test "utils_str": PASSED
Test "stm32f_rtc": PASSED
Test "panic_data_bloonchipper_v2.0.4277": PASSED
Test "panic_data_bloonchipper_v2.0.5938": PASSED
Force-Relevant-Builds: all
Signed-off-by: Tom Hughes <tomhughes@chromium.org>
Change-Id: I264ad0ffe7afcd507a1e483c6e934a9c4fea47c3
Diffstat (limited to 'driver/ioexpander/it8801.h')
-rw-r--r-- | driver/ioexpander/it8801.h | 132 |
1 files changed, 67 insertions, 65 deletions
diff --git a/driver/ioexpander/it8801.h b/driver/ioexpander/it8801.h index 05a17acf78..605c88789b 100644 --- a/driver/ioexpander/it8801.h +++ b/driver/ioexpander/it8801.h @@ -1,4 +1,4 @@ -/* Copyright 2019 The Chromium OS Authors. All rights reserved. +/* Copyright 2019 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. * @@ -14,79 +14,81 @@ #define IT8801_I2C_ADDR2 0x39 /* Keyboard Matrix Scan control (KBS) */ -#define IT8801_REG_KSOMCR 0x40 -#define IT8801_REG_MASK_KSOSDIC BIT(7) -#define IT8801_REG_MASK_KSE BIT(6) -#define IT8801_REG_MASK_AKSOSC BIT(5) -#define IT8801_REG_KSIDR 0x41 -#define IT8801_REG_KSIEER 0x42 -#define IT8801_REG_KSIIER 0x43 -#define IT8801_REG_SMBCR 0xfa -#define IT8801_REG_MASK_ARE BIT(4) -#define IT8801_REG_GIECR 0xfb -#define IT8801_REG_MASK_GKSIIE BIT(3) -#define IT8801_REG_GPIO10 0x12 -#define IT8801_REG_GPIO00_KSO19 0x0a -#define IT8801_REG_GPIO01_KSO18 0x0b -#define IT8801_REG_GPIO22_KSO21 0x1c -#define IT8801_REG_GPIO23_KSO20 0x1d -#define IT8801_REG_MASK_GPIOAFS_PULLUP BIT(7) -#define IT8801_REG_MASK_GPIOAFS_FUNC2 BIT(6) -#define IT8801_REG_MASK_GPIODIR BIT(5) -#define IT8801_REG_MASK_GPIOPUE BIT(0) -#define IT8801_REG_GPIO23SOV BIT(3) -#define IT8801_REG_MASK_SELKSO2 0x02 -#define IT8801_REG_GISR 0xF9 -#define IT8801_REG_MASK_GISR_GKSIIS BIT(6) -#define IT8801_REG_MASK_GISR_GGPIOG2IS BIT(2) -#define IT8801_REG_MASK_GISR_GGPIOG1IS BIT(1) -#define IT8801_REG_MASK_GISR_GGPIOG0IS BIT(0) -#define IT8801_REG_MASK_GISR_GGPIOGXIS (IT8801_REG_MASK_GISR_GGPIOG2IS | \ - IT8801_REG_MASK_GISR_GGPIOG1IS | IT8801_REG_MASK_GISR_GGPIOG0IS) -#define IT8801_REG_LBVIDR 0xFE -#define IT8801_REG_HBVIDR 0xFF -#define IT8801_KSO_COUNT 18 +#define IT8801_REG_KSOMCR 0x40 +#define IT8801_REG_MASK_KSOSDIC BIT(7) +#define IT8801_REG_MASK_KSE BIT(6) +#define IT8801_REG_MASK_AKSOSC BIT(5) +#define IT8801_REG_KSIDR 0x41 +#define IT8801_REG_KSIEER 0x42 +#define IT8801_REG_KSIIER 0x43 +#define IT8801_REG_SMBCR 0xfa +#define IT8801_REG_MASK_ARE BIT(4) +#define IT8801_REG_GIECR 0xfb +#define IT8801_REG_MASK_GKSIIE BIT(3) +#define IT8801_REG_GPIO10 0x12 +#define IT8801_REG_GPIO00_KSO19 0x0a +#define IT8801_REG_GPIO01_KSO18 0x0b +#define IT8801_REG_GPIO22_KSO21 0x1c +#define IT8801_REG_GPIO23_KSO20 0x1d +#define IT8801_REG_MASK_GPIOAFS_PULLUP BIT(7) +#define IT8801_REG_MASK_GPIOAFS_FUNC2 BIT(6) +#define IT8801_REG_MASK_GPIODIR BIT(5) +#define IT8801_REG_MASK_GPIOPUE BIT(0) +#define IT8801_REG_GPIO23SOV BIT(3) +#define IT8801_REG_MASK_SELKSO2 0x02 +#define IT8801_REG_GISR 0xF9 +#define IT8801_REG_MASK_GISR_GKSIIS BIT(6) +#define IT8801_REG_MASK_GISR_GGPIOG2IS BIT(2) +#define IT8801_REG_MASK_GISR_GGPIOG1IS BIT(1) +#define IT8801_REG_MASK_GISR_GGPIOG0IS BIT(0) +#define IT8801_REG_MASK_GISR_GGPIOGXIS \ + (IT8801_REG_MASK_GISR_GGPIOG2IS | IT8801_REG_MASK_GISR_GGPIOG1IS | \ + IT8801_REG_MASK_GISR_GGPIOG0IS) +#define IT8801_REG_LBVIDR 0xFE +#define IT8801_REG_HBVIDR 0xFF +#define IT8801_KSO_COUNT 18 /* General Purpose I/O Port (GPIO) */ -#define IT8801_SUPPORT_GPIO_FLAGS (GPIO_OPEN_DRAIN | GPIO_INPUT | \ - GPIO_OUTPUT | GPIO_LOW | GPIO_HIGH | GPIO_INT_ANY) +#define IT8801_SUPPORT_GPIO_FLAGS \ + (GPIO_OPEN_DRAIN | GPIO_INPUT | GPIO_OUTPUT | GPIO_LOW | GPIO_HIGH | \ + GPIO_INT_ANY) -#define IT8801_REG_MASK_GPIOAFS_FUNC1 (0x00 << 7) +#define IT8801_REG_MASK_GPIOAFS_FUNC1 (0x00 << 7) /* IT8801 only supports GPIO 0/1/2 */ -#define IT8801_VALID_GPIO_G0_MASK 0xD9 -#define IT8801_VALID_GPIO_G1_MASK 0x3F -#define IT8801_VALID_GPIO_G2_MASK 0x0F +#define IT8801_VALID_GPIO_G0_MASK 0xD9 +#define IT8801_VALID_GPIO_G1_MASK 0x3F +#define IT8801_VALID_GPIO_G2_MASK 0x0F extern __override_proto const uint8_t it8801_kso_mapping[]; extern const struct ioexpander_drv it8801_ioexpander_drv; /* GPIO Register map */ /* Input pin status register */ -#define IT8801_REG_GPIO_IPSR(port) (0x00 + (port)) +#define IT8801_REG_GPIO_IPSR(port) (0x00 + (port)) /* Set output value register */ -#define IT8801_REG_GPIO_SOVR(port) (0x05 + (port)) +#define IT8801_REG_GPIO_SOVR(port) (0x05 + (port)) /* Control register */ -#define IT8801_REG_GPIO_CR(port, mask) \ - (0x0A + (port) * 8 + GPIO_MASK_TO_NUM(mask)) +#define IT8801_REG_GPIO_CR(port, mask) \ + (0x0A + (port)*8 + GPIO_MASK_TO_NUM(mask)) /* Interrupt status register */ -#define IT8801_REG_GPIO_ISR(port) (0x32 + (port)) +#define IT8801_REG_GPIO_ISR(port) (0x32 + (port)) /* Interrupt enable register */ -#define IT8801_REG_GPIO_IER(port) (0x37 + (port)) +#define IT8801_REG_GPIO_IER(port) (0x37 + (port)) /* Control register values */ -#define IT8801_GPIOAFS_SHIFT 6 /* bit 6~7 */ +#define IT8801_GPIOAFS_SHIFT 6 /* bit 6~7 */ -#define IT8801_GPIODIR BIT(5) /* direction, output=1 */ +#define IT8801_GPIODIR BIT(5) /* direction, output=1 */ /* input pin */ -#define IT8801_GPIOIOT_INT_RISING BIT(3) -#define IT8801_GPIOIOT_INT_FALLING BIT(4) +#define IT8801_GPIOIOT_INT_RISING BIT(3) +#define IT8801_GPIOIOT_INT_FALLING BIT(4) -#define IT8801_GPIODIR BIT(5) -#define IT8801_GPIOIOT BIT(4) -#define IT8801_GPIOPOL BIT(2) /* polarity */ -#define IT8801_GPIOPDE BIT(1) /* pull-down enable */ -#define IT8801_GPIOPUE BIT(0) /* pull-up enable */ +#define IT8801_GPIODIR BIT(5) +#define IT8801_GPIOIOT BIT(4) +#define IT8801_GPIOPOL BIT(2) /* polarity */ +#define IT8801_GPIOPDE BIT(1) /* pull-down enable */ +#define IT8801_GPIOPUE BIT(0) /* pull-up enable */ /* ISR for IT8801's SMB_INT# */ void io_expander_it8801_interrupt(enum gpio_signal signal); @@ -109,18 +111,18 @@ uint16_t it8801_pwm_get_raw_duty(enum pwm_channel ch); void it8801_pwm_set_duty(enum pwm_channel ch, int percent); int it8801_pwm_get_duty(enum pwm_channel ch); -#define IT8801_REG_PWMODDSR 0x5F -#define IT8801_REG_PWMMCR(n) (0x60 + ((n) - 1) * 8) -#define IT8801_REG_PWMDCR(n) (0x64 + ((n) - 1) * 8) -#define IT8801_REG_PWMPRSL(n) (0x66 + ((n) - 1) * 8) -#define IT8801_REG_PWMPRSM(n) (0x67 + ((n) - 1) * 8) +#define IT8801_REG_PWMODDSR 0x5F +#define IT8801_REG_PWMMCR(n) (0x60 + ((n)-1) * 8) +#define IT8801_REG_PWMDCR(n) (0x64 + ((n)-1) * 8) +#define IT8801_REG_PWMPRSL(n) (0x66 + ((n)-1) * 8) +#define IT8801_REG_PWMPRSM(n) (0x67 + ((n)-1) * 8) -#define IT8801_PWMMCR_MCR_MASK 0x3 -#define IT8801_PWMMCR_MCR_OFF 0 -#define IT8801_PWMMCR_MCR_BLINKING 1 -#define IT8801_PWMMCR_MCR_BREATHING 2 -#define IT8801_PWMMCR_MCR_ON 3 +#define IT8801_PWMMCR_MCR_MASK 0x3 +#define IT8801_PWMMCR_MCR_OFF 0 +#define IT8801_PWMMCR_MCR_BLINKING 1 +#define IT8801_PWMMCR_MCR_BREATHING 2 +#define IT8801_PWMMCR_MCR_ON 3 -#endif /* CONFIG_IO_EXPANDER_IT8801_PWM */ +#endif /* CONFIG_IO_EXPANDER_IT8801_PWM */ #endif /* __CROS_EC_KBEXPANDER_IT8801_H */ |