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| author | Jack Rosenthal <jrosenth@chromium.org> | 2022-06-27 14:51:10 -0600 |
|---|---|---|
| committer | Chromeos LUCI <chromeos-scoped@luci-project-accounts.iam.gserviceaccount.com> | 2022-06-27 23:29:06 +0000 |
| commit | 20bcca715468f123f51e5e506695a3b1de6dc3a8 (patch) | |
| tree | 80273e7e10f2bf688bb389788474eb898ed73c28 /driver/led | |
| parent | 9a1d9ca78fd9abaf7e6d4ed47483341ac65a78f1 (diff) | |
| download | chrome-ec-20bcca715468f123f51e5e506695a3b1de6dc3a8.tar.gz | |
driver/led/is31fl3743b.c: Format with clang-format
BUG=b:236386294
BRANCH=none
TEST=none
Change-Id: I9b64fa2eec7511548600e7f1a8627409c406b214
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3729996
Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
Diffstat (limited to 'driver/led')
| -rw-r--r-- | driver/led/is31fl3743b.c | 52 |
1 files changed, 26 insertions, 26 deletions
diff --git a/driver/led/is31fl3743b.c b/driver/led/is31fl3743b.c index a07b2f63f8..eed9c80acc 100644 --- a/driver/led/is31fl3743b.c +++ b/driver/led/is31fl3743b.c @@ -17,30 +17,30 @@ #define SPI(id) (&(spi_devices[id])) -#define IS31FL3743B_ROW_SIZE 6 -#define IS31FL3743B_COL_SIZE 11 -#define IS31FL3743B_GRID_SIZE (IS31FL3743B_COL_SIZE * IS31FL3743B_ROW_SIZE) -#define IS31FL3743B_BUF_SIZE (SIZE_OF_RGB * IS31FL3743B_GRID_SIZE) - -#define IS31FL3743B_CMD_ID 0b101 -#define IS31FL3743B_PAGE_PWM 0 -#define IS31FL3743B_PAGE_SCALE 1 -#define IS31FL3743B_PAGE_FUNC 2 - -#define IS31FL3743B_REG_CONFIG 0x00 -#define IS31FL3743B_REG_GCC 0x01 -#define IS31FL3743B_REG_PD_PU 0x02 -#define IS31FL3743B_REG_SPREAD_SPECTRUM 0x25 -#define IS31FL3743B_REG_RSTN 0x2f - -#define IS31FL3743B_CFG_SWS_1_11 0b0000 +#define IS31FL3743B_ROW_SIZE 6 +#define IS31FL3743B_COL_SIZE 11 +#define IS31FL3743B_GRID_SIZE (IS31FL3743B_COL_SIZE * IS31FL3743B_ROW_SIZE) +#define IS31FL3743B_BUF_SIZE (SIZE_OF_RGB * IS31FL3743B_GRID_SIZE) + +#define IS31FL3743B_CMD_ID 0b101 +#define IS31FL3743B_PAGE_PWM 0 +#define IS31FL3743B_PAGE_SCALE 1 +#define IS31FL3743B_PAGE_FUNC 2 + +#define IS31FL3743B_REG_CONFIG 0x00 +#define IS31FL3743B_REG_GCC 0x01 +#define IS31FL3743B_REG_PD_PU 0x02 +#define IS31FL3743B_REG_SPREAD_SPECTRUM 0x25 +#define IS31FL3743B_REG_RSTN 0x2f + +#define IS31FL3743B_CFG_SWS_1_11 0b0000 #define IS31FL3743B_CONFIG(sws, osde, ssd) \ ((sws) << 4 | BIT(3) | (osde) << 1 | (ssd) << 0) struct is31fl3743b_cmd { - uint8_t page: 4; - uint8_t id: 3; - uint8_t read: 1; + uint8_t page : 4; + uint8_t id : 3; + uint8_t read : 1; } __packed; struct is31fl3743b_msg { @@ -49,8 +49,8 @@ struct is31fl3743b_msg { uint8_t payload[]; } __packed; -__maybe_unused -static int is31fl3743b_read(struct rgbkbd *ctx, uint8_t addr, uint8_t *value) +__maybe_unused static int is31fl3743b_read(struct rgbkbd *ctx, uint8_t addr, + uint8_t *value) { uint8_t buf[8]; struct is31fl3743b_msg *msg = (void *)buf; @@ -81,8 +81,8 @@ static int is31fl3743b_write(struct rgbkbd *ctx, uint8_t addr, uint8_t value) static int is31fl3743b_enable(struct rgbkbd *ctx, bool enable) { - uint8_t u8 = IS31FL3743B_CONFIG(IS31FL3743B_CFG_SWS_1_11, 0, - enable ? 1 : 0); + uint8_t u8 = + IS31FL3743B_CONFIG(IS31FL3743B_CFG_SWS_1_11, 0, enable ? 1 : 0); CPRINTS("Setting config register to 0b%pb", BINARY_VALUE(u8, 8)); return is31fl3743b_write(ctx, IS31FL3743B_REG_CONFIG, u8); } @@ -104,7 +104,7 @@ static int is31fl3743b_set_color(struct rgbkbd *ctx, uint8_t offset, return EC_ERROR_OVERFLOW; } - msg->addr = frame_offset + 1; /* Register addr base is 1. */ + msg->addr = frame_offset + 1; /* Register addr base is 1. */ for (i = 0; i < len; i++) { msg->payload[i * SIZE_OF_RGB + 0] = color[i].r; msg->payload[i * SIZE_OF_RGB + 1] = color[i].g; @@ -131,7 +131,7 @@ static int is31fl3743b_set_scale(struct rgbkbd *ctx, uint8_t offset, return EC_ERROR_OVERFLOW; } - msg->addr = frame_offset + 1; /* Address base is 1. */ + msg->addr = frame_offset + 1; /* Address base is 1. */ for (i = 0; i < len; i++) { msg->payload[i * SIZE_OF_RGB + 0] = scale.r; msg->payload[i * SIZE_OF_RGB + 1] = scale.g; |