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| author | Caveh Jalali <caveh@chromium.org> | 2018-12-06 14:41:16 -0800 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2018-12-18 00:42:54 -0800 |
| commit | 16c9d6d25326a011b518753cf40a782c738391a1 (patch) | |
| tree | 7873edb735f6731ba722425e92739f2db38eb0fa /driver/pmic_bd99992gw.h | |
| parent | ae966f6cf0b82bd65074599d71a753a7375dc327 (diff) | |
| download | chrome-ec-16c9d6d25326a011b518753cf40a782c738391a1.tar.gz | |
atlas: enable active discharge on all rails
this enables active discharge on all 12 power rails controlled by the
ROHM ROP PMIC.
BUG=b:120619543
BRANCH=none
TEST=discharge behavior verified by sajedfarzam@
Change-Id: I842dbdcc1eab596230e12130dca272a1f449e268
Signed-off-by: Caveh Jalali <caveh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1371226
Commit-Ready: caveh jalali <caveh@chromium.org>
Tested-by: caveh jalali <caveh@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Diffstat (limited to 'driver/pmic_bd99992gw.h')
| -rw-r--r-- | driver/pmic_bd99992gw.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/driver/pmic_bd99992gw.h b/driver/pmic_bd99992gw.h index 9275e3818f..db259a7b18 100644 --- a/driver/pmic_bd99992gw.h +++ b/driver/pmic_bd99992gw.h @@ -20,8 +20,10 @@ #define BD99992GW_REG_V100ACNT 0x37 #define BD99992GW_REG_V085ACNT 0x38 #define BD99992GW_REG_VRMODECTRL 0x3b +#define BD99992GW_REG_DISCHGCNT1 0x3c #define BD99992GW_REG_DISCHGCNT2 0x3d #define BD99992GW_REG_DISCHGCNT3 0x3e +#define BD99992GW_REG_DISCHGCNT4 0x3f #define BD99992GW_REG_SDWNCTRL 0x49 #define BD99992GW_SDWNCTRL_SWDN (1 << 0) /* SWDN mask */ |