summaryrefslogtreecommitdiff
path: root/driver/pmic_tps650x30.h
diff options
context:
space:
mode:
authorAseda Aboagye <aaboagye@google.com>2017-10-23 16:24:01 -0700
committerchrome-bot <chrome-bot@chromium.org>2017-10-26 20:20:59 -0700
commitde63c628223b36f5536f1a69232e8259086e6f1d (patch)
tree61d44113cf1b1f81d45e970a5009f66e36f83f51 /driver/pmic_tps650x30.h
parent2d06b37e0efb781f5b12ae1fb794b832fd93fbcf (diff)
downloadchrome-ec-de63c628223b36f5536f1a69232e8259086e6f1d.tar.gz
driver: Rename pmic_tps650830 -> pmic_tps650x30.
The registers seem to be the same for the TPS650930, therefore, this commit just renames the register map to have a more generic name. BUG=None BRANCH=None TEST=make -j buildall Change-Id: Ib1c604b29e7f0e47cc036e042fe597f644d7ad36 Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/736311 Commit-Ready: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org>
Diffstat (limited to 'driver/pmic_tps650x30.h')
-rw-r--r--driver/pmic_tps650x30.h35
1 files changed, 35 insertions, 0 deletions
diff --git a/driver/pmic_tps650x30.h b/driver/pmic_tps650x30.h
new file mode 100644
index 0000000000..16b923d640
--- /dev/null
+++ b/driver/pmic_tps650x30.h
@@ -0,0 +1,35 @@
+/* Copyright 2017 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ *
+ * TI TPS650x30 PMIC register map.
+ */
+
+#ifndef __CROS_EC_PMIC_TPS650X30_H
+#define __CROS_EC_PMIC_TPS650X30_H
+
+/* I2C interface */
+#define TPS650X30_I2C_ADDR1 (0x30 << 1)
+#define TPS650X30_I2C_ADDR2 (0x32 << 1)
+#define TPS650X30_I2C_ADDR3 (0x34 << 1)
+
+/* TPS650X30 registers */
+#define TPS650X30_REG_VENDORID 0x00
+#define TPS650X30_REG_PBCONFIG 0x14
+#define TPS650X30_REG_PGMASK1 0x18
+#define TPS650X30_REG_VCCIOCNT 0x30
+#define TPS650X30_REG_V5ADS3CNT 0x31
+#define TPS650X30_REG_V33ADSWCNT 0x32
+#define TPS650X30_REG_V18ACNT 0x34
+#define TPS650X30_REG_V1P2UCNT 0x36
+#define TPS650X30_REG_VRMODECTRL 0x3B
+#define TPS650X30_REG_DISCHCNT1 0x3C
+#define TPS650X30_REG_DISCHCNT2 0x3D
+#define TPS650X30_REG_DISCHCNT3 0x3E
+#define TPS650X30_REG_DISCHCNT4 0x3F
+#define TPS650X30_REG_PWFAULT_MASK1 0xE5
+
+/* TPS650X30 register values */
+#define TPS650X30_VENDOR_ID 0x22
+
+#endif /* __CROS_EC_PMIC_TPS650X30_H */