cr50: speed up bit bang EC programming

The original bit bang programming implementation attempted to provide
a fully functional alternative UART interface for the case when EC
programming is required, so that proper UART parity can be ensured.

Come to think of it, this is not really necessary:

 - EC programming over UART does not require full duplex.

 - when EC is being programmed, the AP is held in reset, there is no
   need to support AP console or TPM at that time, as a result
   interrupts could be disabled for somewhat longer intervals.

This patch introduces the following modifications:

  - remove uartn interface redirections - when bitbang mode is enabled
    regular EC console is not available.

  - instead of waiting for fixed amount of cycles on every bit, wait
    for the deadline calculated when character transmission started on
    tx side or when the original start bit was detected on rx side and
    recalculated after each clock.

  - when finishing receiving a character do not exit ISR right away,
    spin for a duration of a character polling the rx line, in case
    the EC keeps transmitting. The rx buffer is allocated on the ISR
    stack and is limited to 20 bytes, which would probably cause an
    overrun if this interface were used for reading flash contents
    from the EC.

  - connect USB EC console flow directly to the bit bang driver when
    bit bang mode is enabled and disable interrupts from the EC UART.

  - do not use the GPIO wrappers for bit bang interrupt processing -
    it takes too long.

  - when starting a bit bang session set the clock timer value to
    zero, this allows not to worry about wraparound, which will happen
    in almost 3 minutes, programming session should not take this
    long.

  - for the duration of 'bit bang enabled' state servo detection
    interrupt is disabled, it gets re-enabled after bit bang mode is
    disabled and servo_detect() gets to run on 1s hook.

  - it is not enough to check the DIOB5 pinmux state to tell if EC
    UART is connected or not, as this pin could be connected in bit
    bang mode as well; always report EC TX UART as disconnected when
    bit bang mode is enabled.

  - for the duration of bit bang programming session suppress
    'aggregate' GPIO interrupts, triggered per port when GPIO
    interrupt is asserted.

Additional speed up could be achieved if gpio driver wrappers were
replaced with direct register accesses, but even as presented this
patch allows to reliably program the STM32 on Scarlet at 57600 baud,
which is 6 times faster than the current state.

BRANCH=cr50, cr50-mp
BUG=b:62539385
TEST=with some flash_ec modifications which make sure that bit bang
     mode is enabled properly (fixing timing of setting boot0 and
     resetting the EC), Scarlet device EC can be reprogrammed at 57600
     baud 100 times in a row with and without logic analyzer connected
     to the EC UART pins.

Change-Id: I2e3520f158943323cb015fa18650a7e177f03cc3
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1171221
Reviewed-by: Randall Spangler <rspangler@chromium.org>

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