Merge remote-tracking branch cros/main into firmware-fpmcu-bloonchipper-releasefirmware-fpmcu-bloonchipper-release

Generated by: ./util/update_release_branch.py --board bloonchipper
--relevant_paths_file ./util/fingerprint-relevant-paths.txt firmware-
fpmcu-bloonchipper-release

Relevant changes:

git log --oneline e5fb0b9ba4..28712dae9d -- board/hatch_fp
board/bloonchipper common/fpsensor docs/fingerprint driver/fingerprint
util/getversion.sh

ded9307b79 util/getversion.sh: Fix version when not in a git repo
956055e692 board: change Google USB vendor info
71b2ef709d Update license boilerplate text in source code files
33e11afda0 Revert "fpsensor: Build fpsensor source file with C++"
c8d0360723 fpsensor: Build fpsensor source file with C++
bc113abd53 fpsensor: Fix g++ compiler error
150a58a0dc fpsensor: Fix fp_set_sensor_mode return type
b33b5ce85b fpsensor: Remove nested designators for C++ compatibility
2e864b2539 tree-wide: const-ify argv for console commands
56d8b360f9 test: Add test for get ikm failure when seed not set
3a3d6c3690 test: Add test for fpsensor trivial key failure
233e6bbd08 fpsensor_crypto: Abstract calls to hmac_SHA256
0a041b285b docs/fingerprint: Typo correction
c03fab67e2 docs/fingerprint: Fix the path of fputils.py
0b5d4baf5a util/getversion.sh: Fix empty file list handling
6e128fe760 FPMCU dev board environment with Satlab
3eb29b6aa5 builtin: Move ssize_t to sys/types.h
345d62ebd1 docs/fingerprint: Update power numbers for latest dartmonkey release
c25ffdb316 common: Conditionally support printf %l and %i modifiers
9a3c514b45 test: Add a test to check if the debugger is connected
54e603413f Move standard library tests to their own file
43fa6b4bf8 docs/fingerprint: Update power numbers for latest bloonchipper release
25536f9a84 driver/fingerprint/fpc/bep/fpc_sensor_spi.c: Format with clang-format
4face99efd driver/fingerprint/fpc/libfp/fpc_sensor_pal.h: Format with clang-format
738de2b575 trng: Rename rand to trng_rand
14b8270edd docs/fingerprint: Update dragonclaw power numbers
0b268f93d1 driver/fingerprint/fpc/libfp/fpc_private.c: Format with clang-format
f80da163f2 driver/fingerprint/fpc/libfp/fpc_private.h: Format with clang-format
5e9c85c9b1 driver/fingerprint/fpc/libfp/fpc_sensor_pal.c: Format with clang-format
c1f9dd3cf8 driver/fingerprint/fpc/libfp/fpc_bio_algorithm.h: Format with clang-format
eb1e1bed8d driver/fingerprint/fpc/libfp/fpc1145_private.h: Format with clang-format
6e7b611821 driver/fingerprint/fpc/bep/fpc_bio_algorithm.h: Format with clang-format
e0589cd5e2 driver/fingerprint/fpc/bep/fpc1035_private.h: Format with clang-format
7905e556a0 common/fpsensor/fpsensor_crypto.c: Format with clang-format
21289d170c driver/fingerprint/fpc/bep/fpc1025_private.h: Format with clang-format
98a20f937e common/fpsensor/fpsensor_state.c: Format with clang-format
a2d255d8af common/fpsensor/fpsensor.c: Format with clang-format
73055eeb3f driver/fingerprint/fpc/bep/fpc_private.c: Format with clang-format
0f7b5cb509 common/fpsensor/fpsensor_private.h: Format with clang-format
1ceade6e65 driver/fingerprint/fpc/bep/fpc_private.h: Format with clang-format
dc3e9008b8 board/hatch_fp/board.h: Format with clang-format
dca9d74321 Revert "trng: Rename rand to trng_rand"
a6b0b3554f trng: Rename rand to trng_rand
28d0b75b70 third_party/boringssl: Remove unused header

BRANCH=None
BUG=b:246424843 b:234181908 b:244781166 b:234181908 b:244387210
BUG=b:242720240 chromium:1098010 b:180945056 b:236025198 b:234181908
BUG=b:234181908 b:237344361 b:131913998 b:236386294 b:234143158
BUG=b:234781655 b:215613183 b:242720910
TEST=`make -j buildall`
TEST=./test/run_device_tests.py --board bloonchipper
     Test "aes": PASSED
     Test "cec": PASSED
     Test "cortexm_fpu": PASSED
     Test "crc": PASSED
     Test "flash_physical": PASSED
     Test "flash_write_protect": PASSED
     Test "fpsensor_hw": PASSED
     Test "fpsensor_spi_ro": PASSED
     Test "fpsensor_spi_rw": PASSED
     Test "fpsensor_uart_ro": PASSED
     Test "fpsensor_uart_rw": PASSED
     Test "mpu_ro": PASSED
     Test "mpu_rw": PASSED
     Test "mutex": PASSED
     Test "pingpong": PASSED
     Test "printf": PASSED
     Test "queue": PASSED
     Test "rollback_region0": PASSED
     Test "rollback_region1": PASSED
     Test "rollback_entropy": PASSED
     Test "rtc": PASSED
     Test "sha256": PASSED
     Test "sha256_unrolled": PASSED
     Test "static_if": PASSED
     Test "stdlib": PASSED
     Test "system_is_locked_wp_on": PASSED
     Test "system_is_locked_wp_off": PASSED
     Test "timer_dos": PASSED
     Test "utils": PASSED
     Test "utils_str": PASSED
     Test "stm32f_rtc": PASSED
     Test "panic_data_bloonchipper_v2.0.4277": PASSED
     Test "panic_data_bloonchipper_v2.0.5938": PASSED

Force-Relevant-Builds: all
Signed-off-by: Tom Hughes <tomhughes@chromium.org>
Change-Id: I264ad0ffe7afcd507a1e483c6e934a9c4fea47c3

1 files changed, 105 insertions, 105 deletions

diff --git a/driver/ppc/rt1739.h b/driver/ppc/rt1739.h
index 2f9b196011..d93369094f 100644
--- a/driver/ppc/rt1739.h
+++ b/driver/ppc/rt1739.h
@@ -1,4 +1,4 @@
-/* Copyright 2022 The Chromium OS Authors. All rights reserved.
+/* Copyright 2022 The ChromiumOS Authors
  * Use of this source code is governed by a BSD-style license that can be
  * found in the LICENSE file.
  */
@@ -16,110 +16,110 @@
 #define RT1739_ADDR3_FLAGS 0x72
 #define RT1739_ADDR4_FLAGS 0x73
 
-#define RT1739_REG_DEVICE_ID0		0x02
-#define RT1739_DEVICE_ID_ES1			0x11
-#define RT1739_DEVICE_ID_ES2			0x12
-
-#define RT1739_REG_SW_RESET		0x04
-#define RT1739_SW_RESET				BIT(0)
-
-#define RT1739_REG_INT_MASK4		0x0C
-#define RT1739_FRS_RX_MASK			BIT(4)
-
-#define RT1739_REG_INT_MASK5		0x0D
-#define RT1739_BC12_SNK_DONE_MASK		BIT(0)
-
-#define RT1739_REG_INT_EVENT4		0x14
-
-#define RT1739_REG_INT_EVENT5		0x15
-#define RT1739_BC12_SNK_DONE_INT		BIT(0)
-
-#define RT1739_REG_INT_STS4		0x1C
-#define RT1739_VBUS_VALID			BIT(2)
-#define RT1739_VBUS_PRESENT			BIT(0)
-
-#define RT1739_REG_SYS_CTRL		0x20
-#define RT1739_OT_EN				BIT(4)
-#define RT1739_SHUTDOWN_OFF			BIT(0)
-
-#define RT1739_REG_VBUS_SWITCH_CTRL	0x21
-#define RT1739_LV_SRC_EN			BIT(2)
-#define RT1739_HV_SRC_EN			BIT(1)
-#define RT1739_HV_SNK_EN			BIT(0)
-
-#define RT1739_REG_VBUS_CTRL1		0x23
-#define RT1739_HVLV_SCP_EN			BIT(1)
-#define RT1739_HVLV_OCRC_EN			BIT(0)
-
-#define RT1739_REG_VBUS_OV_SETTING	0x24
-
-#define RT1739_VBUS_OVP_SEL_SHIFT		0
-#define RT1739_VIN_HV_OVP_SEL_SHIFT		4
-#define RT1739_OVP_SEL_6_0V			0
-#define RT1739_OVP_SEL_6_8V			1
-#define RT1739_OVP_SEL_10_0V			2
-#define RT1739_OVP_SEL_11_5V			3
-#define RT1739_OVP_SEL_14_0V			4
-#define RT1739_OVP_SEL_17_0V			5
-#define RT1739_OVP_SEL_23_0V			6
-
-#define RT1739_REG_VBUS_OC_SETTING	0x25
-
-#define RT1739_LV_SRC_OCP_SHIFT			4
-#define RT1739_LV_SRC_OCP_SEL_1_25A		(0 << RT1739_LV_SRC_OCP_SHIFT)
-#define RT1739_LV_SRC_OCP_SEL_1_75A		(1 << RT1739_LV_SRC_OCP_SHIFT)
-#define RT1739_LV_SRC_OCP_SEL_2_25A		(2 << RT1739_LV_SRC_OCP_SHIFT)
-#define RT1739_LV_SRC_OCP_SEL_3_3A		(3 << RT1739_LV_SRC_OCP_SHIFT)
-
-#define RT1739_HV_SINK_OCP_SHIFT		0
-#define RT1739_HV_SINK_OCP_SEL_1_25A		(0 << RT1739_HV_SINK_OCP_SHIFT)
-#define RT1739_HV_SINK_OCP_SEL_1_75A		(1 << RT1739_HV_SINK_OCP_SHIFT)
-#define RT1739_HV_SINK_OCP_SEL_3_3A		(2 << RT1739_HV_SINK_OCP_SHIFT)
-#define RT1739_HV_SINK_OCP_SEL_5_5A		(3 << RT1739_HV_SINK_OCP_SHIFT)
-
-#define RT1739_VBUS_FAULT_DIS		0x26
-#define RT1739_OVP_DISVBUS_EN			BIT(6)
-#define RT1739_UVLO_DISVBUS_EN			BIT(5)
-#define RT1739_SRCP_DISVBUS_EN			BIT(4)
-#define RT1739_RCP_DISVBUS_EN			BIT(3)
-#define RT1739_SCP_DISVBUS_EN			BIT(2)
-#define RT1739_OCPS_DISVBUS_EN			BIT(1)
-#define RT1739_OCP_DISVBUS_EN			BIT(0)
-
-#define RT1739_REG_VBUS_DET_EN		0x27
-#define RT1739_VBUS_SAFE5V_EN			BIT(2)
-#define RT1739_VBUS_SAFE0V_EN			BIT(1)
-#define RT1739_VBUS_PRESENT_EN			BIT(0)
-
-#define RT1739_REG_CC_FRS_CTRL1		0x2D
-#define RT1739_FRS_RX_EN			BIT(1)
-
-#define RT1739_REG_VCONN_CTRL1		0x31
-#define RT1739_VCONN_ORIENT			BIT(1)
-#define RT1739_VCONN_EN				BIT(0)
-
-#define RT1739_VCONN_ORIENT_CC1			MASK_SET
-#define RT1739_VCONN_ORIENT_CC2			MASK_CLR
-
-#define RT1739_REG_VCONN_CTRL3		0x33
-#define RT1739_VCONN_CLIMIT_EN		BIT(0)
-
-#define RT1739_REG_SBU_CTRL_01		0x38
-#define RT1739_SBUSW_MUX_SEL		BIT(4)
-#define RT1739_DM_SWEN				BIT(1)
-#define RT1739_DP_SWEN				BIT(0)
-
-#define RT1739_REG_BC12_SNK_FUNC	0x40
-#define RT1739_BC12_SNK_EN			BIT(7)
-
-#define RT1739_REG_BC12_STAT		0x41
-#define RT1739_PORT_STAT_MASK			0x0F
-#define RT1739_PORT_STAT_SDP			0x0D
-#define RT1739_PORT_STAT_CDP			0x0E
-#define RT1739_PORT_STAT_DCP			0x0F
-
-#define RT1739_REG_SYS_CTRL1		0x60
-#define RT1739_OSC640K_FORCE_EN			BIT(3)
+#define RT1739_REG_DEVICE_ID0 0x02
+#define RT1739_DEVICE_ID_ES1 0x11
+#define RT1739_DEVICE_ID_ES2 0x12
+
+#define RT1739_REG_SW_RESET 0x04
+#define RT1739_SW_RESET BIT(0)
+
+#define RT1739_REG_INT_MASK4 0x0C
+#define RT1739_FRS_RX_MASK BIT(4)
+
+#define RT1739_REG_INT_MASK5 0x0D
+#define RT1739_BC12_SNK_DONE_MASK BIT(0)
+
+#define RT1739_REG_INT_EVENT4 0x14
+
+#define RT1739_REG_INT_EVENT5 0x15
+#define RT1739_BC12_SNK_DONE_INT BIT(0)
+
+#define RT1739_REG_INT_STS4 0x1C
+#define RT1739_VBUS_VALID BIT(2)
+#define RT1739_VBUS_PRESENT BIT(0)
+
+#define RT1739_REG_SYS_CTRL 0x20
+#define RT1739_OT_EN BIT(4)
+#define RT1739_SHUTDOWN_OFF BIT(0)
+
+#define RT1739_REG_VBUS_SWITCH_CTRL 0x21
+#define RT1739_LV_SRC_EN BIT(2)
+#define RT1739_HV_SRC_EN BIT(1)
+#define RT1739_HV_SNK_EN BIT(0)
+
+#define RT1739_REG_VBUS_CTRL1 0x23
+#define RT1739_HVLV_SCP_EN BIT(1)
+#define RT1739_HVLV_OCRC_EN BIT(0)
+
+#define RT1739_REG_VBUS_OV_SETTING 0x24
+
+#define RT1739_VBUS_OVP_SEL_SHIFT 0
+#define RT1739_VIN_HV_OVP_SEL_SHIFT 4
+#define RT1739_OVP_SEL_6_0V 0
+#define RT1739_OVP_SEL_6_8V 1
+#define RT1739_OVP_SEL_10_0V 2
+#define RT1739_OVP_SEL_11_5V 3
+#define RT1739_OVP_SEL_14_0V 4
+#define RT1739_OVP_SEL_17_0V 5
+#define RT1739_OVP_SEL_23_0V 6
+
+#define RT1739_REG_VBUS_OC_SETTING 0x25
+
+#define RT1739_LV_SRC_OCP_SHIFT 4
+#define RT1739_LV_SRC_OCP_SEL_1_25A (0 << RT1739_LV_SRC_OCP_SHIFT)
+#define RT1739_LV_SRC_OCP_SEL_1_75A (1 << RT1739_LV_SRC_OCP_SHIFT)
+#define RT1739_LV_SRC_OCP_SEL_2_25A (2 << RT1739_LV_SRC_OCP_SHIFT)
+#define RT1739_LV_SRC_OCP_SEL_3_3A (3 << RT1739_LV_SRC_OCP_SHIFT)
+
+#define RT1739_HV_SINK_OCP_SHIFT 0
+#define RT1739_HV_SINK_OCP_SEL_1_25A (0 << RT1739_HV_SINK_OCP_SHIFT)
+#define RT1739_HV_SINK_OCP_SEL_1_75A (1 << RT1739_HV_SINK_OCP_SHIFT)
+#define RT1739_HV_SINK_OCP_SEL_3_3A (2 << RT1739_HV_SINK_OCP_SHIFT)
+#define RT1739_HV_SINK_OCP_SEL_5_5A (3 << RT1739_HV_SINK_OCP_SHIFT)
+
+#define RT1739_VBUS_FAULT_DIS 0x26
+#define RT1739_OVP_DISVBUS_EN BIT(6)
+#define RT1739_UVLO_DISVBUS_EN BIT(5)
+#define RT1739_SRCP_DISVBUS_EN BIT(4)
+#define RT1739_RCP_DISVBUS_EN BIT(3)
+#define RT1739_SCP_DISVBUS_EN BIT(2)
+#define RT1739_OCPS_DISVBUS_EN BIT(1)
+#define RT1739_OCP_DISVBUS_EN BIT(0)
+
+#define RT1739_REG_VBUS_DET_EN 0x27
+#define RT1739_VBUS_SAFE5V_EN BIT(2)
+#define RT1739_VBUS_SAFE0V_EN BIT(1)
+#define RT1739_VBUS_PRESENT_EN BIT(0)
+
+#define RT1739_REG_CC_FRS_CTRL1 0x2D
+#define RT1739_FRS_RX_EN BIT(1)
+
+#define RT1739_REG_VCONN_CTRL1 0x31
+#define RT1739_VCONN_ORIENT BIT(1)
+#define RT1739_VCONN_EN BIT(0)
+
+#define RT1739_VCONN_ORIENT_CC1 MASK_SET
+#define RT1739_VCONN_ORIENT_CC2 MASK_CLR
+
+#define RT1739_REG_VCONN_CTRL3 0x33
+#define RT1739_VCONN_CLIMIT_EN BIT(0)
+
+#define RT1739_REG_SBU_CTRL_01 0x38
+#define RT1739_SBUSW_MUX_SEL BIT(4)
+#define RT1739_DM_SWEN BIT(1)
+#define RT1739_DP_SWEN BIT(0)
+
+#define RT1739_REG_BC12_SNK_FUNC 0x40
+#define RT1739_BC12_SNK_EN BIT(7)
+
+#define RT1739_REG_BC12_STAT 0x41
+#define RT1739_PORT_STAT_MASK 0x0F
+#define RT1739_PORT_STAT_SDP 0x0D
+#define RT1739_PORT_STAT_CDP 0x0E
+#define RT1739_PORT_STAT_DCP 0x0F
+
+#define RT1739_REG_SYS_CTRL1 0x60
+#define RT1739_OSC640K_FORCE_EN BIT(3)
 
 extern const struct ppc_drv rt1739_ppc_drv;
 extern const struct bc12_drv rt1739_bc12_drv;