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| author | Jett Rink <jettrink@chromium.org> | 2018-08-07 14:52:04 -0600 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2018-08-23 17:42:49 -0700 |
| commit | 7487f9eef6159b9b3253b4d30e9dd0b114bd07e1 (patch) | |
| tree | 21b506771c042375da02ff0f1171b7f6712d699b /driver/ppc/sn5s330.c | |
| parent | eab2576658393d15af7fc55e97e827951cafa05e (diff) | |
| download | chrome-ec-7487f9eef6159b9b3253b4d30e9dd0b114bd07e1.tar.gz | |
sn5s330: add low power mode
Add a low power mode method for PPCs behind a new config.
Implement the low power method for SN5S330 based off of TI AE
recommendation.
BRANCH=none
BUG=b:111520593,b:111006203
TEST=CL stack produce lower power during bip hibernate
Change-Id: Icd22f88a8f65c2cd5ab1c95b0750b1eb61e91923
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1166183
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Diffstat (limited to 'driver/ppc/sn5s330.c')
| -rw-r--r-- | driver/ppc/sn5s330.c | 57 |
1 files changed, 53 insertions, 4 deletions
diff --git a/driver/ppc/sn5s330.c b/driver/ppc/sn5s330.c index 9855ab1d89..904a968a03 100644 --- a/driver/ppc/sn5s330.c +++ b/driver/ppc/sn5s330.c @@ -514,6 +514,54 @@ static int sn5s330_discharge_vbus(int port, int enable) return EC_SUCCESS; } +static int sn5s330_enter_low_power_mode(int port) +{ + int rv; + + /* Turn off both SRC and SNK FETs */ + rv = clr_flags(port, SN5S330_FUNC_SET3, + SN5S330_PP1_EN | SN5S330_PP2_EN); + + if (rv) { + CPRINTS("ppc p%d: Could not disable both FETS (%d)", port, rv); + return rv; + } + + /* Turn off Vconn power */ + rv = clr_flags(port, SN5S330_FUNC_SET4, SN5S330_VCONN_EN); + + if (rv) { + CPRINTS("ppc p%d: Could not disable Vconn (%d)", port, rv); + return rv; + } + + /* Turn off SBU path */ + rv = clr_flags(port, SN5S330_FUNC_SET2, SN5S330_SBU_EN); + + if (rv) { + CPRINTS("ppc p%d: Could not disable SBU path (%d)", port, rv); + return rv; + } + + /* + * Turn off the Over Voltage Protection circuits. Needs to happen after + * FETs are disabled, otherwise OVP can automatically turned back on. + * Since FETs are off, any over voltage does not make it to the board + * side of the PPC. + */ + rv = clr_flags(port, SN5S330_FUNC_SET9, + SN5S330_FORCE_OVP_EN_SBU | SN5S330_FORCE_ON_VBUS_OVP | + SN5S330_FORCE_ON_VBUS_UVP); + + if (rv) { + CPRINTS("ppc p%d: Could not disable OVP circuit (%d)", port, + rv); + return rv; + } + + return EC_SUCCESS; +} + #ifdef CONFIG_USBC_PPC_VCONN static int sn5s330_set_vconn(int port, int enable) { @@ -600,17 +648,18 @@ const struct ppc_drv sn5s330_drv = { .is_sourcing_vbus = &sn5s330_is_sourcing_vbus, .vbus_sink_enable = &sn5s330_vbus_sink_enable, .vbus_source_enable = &sn5s330_vbus_source_enable, + .set_vbus_source_current_limit = &sn5s330_set_vbus_source_current_limit, + .discharge_vbus = &sn5s330_discharge_vbus, + .enter_low_power_mode = &sn5s330_enter_low_power_mode, #ifdef CONFIG_CMD_PPC_DUMP .reg_dump = &sn5s330_dump, -#endif /* defined(CONFIG_CMD_PPC_DUMP) */ +#endif #ifdef CONFIG_USB_PD_VBUS_DETECT_PPC .is_vbus_present = &sn5s330_is_vbus_present, -#endif /* defined(CONFIG_USB_PD_VBUS_DETECT_PPC) */ +#endif #ifdef CONFIG_USBC_PPC_POLARITY .set_polarity = &sn5s330_set_polarity, #endif - .set_vbus_source_current_limit = &sn5s330_set_vbus_source_current_limit, - .discharge_vbus = &sn5s330_discharge_vbus, #ifdef CONFIG_USBC_PPC_VCONN .set_vconn = &sn5s330_set_vconn, #endif |