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authorMichael5 Chen <michael5_chen@pegatroncorp.com>2019-09-25 19:46:20 +0800
committerCommit Bot <commit-bot@chromium.org>2019-10-14 05:16:24 +0000
commit2972a3ec086dd1b09347a16543638ecc270beffe (patch)
tree55b9b12f9ca2963a625f8c09b3b4c7b965f0b5f8 /driver/ppc/sn5s330.h
parentfd6c12c25cfb45db4b6366d137a84afd4612cfbd (diff)
downloadchrome-ec-2972a3ec086dd1b09347a16543638ecc270beffe.tar.gz
helios: Detect PPC sn5s330 CC1/CC2 OVP and release OVP.
If PPC have CC OVP protection, check VBUS_GOOD. If VBUS_GOOD is ok, release CC OVP. BUG=b:141587322 BRANCH=Master TEST=Manual Do ESD test to trigger CC1/CC2 OVP. Using EC console command PPC_DUMP to check ppc regiset is correct. Change-Id: I3b817cc1dcec4c14ed4e2098b7ad7582b938f613 Signed-off-by: Michael5 Chen <michael5_chen@pegatroncorp.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1826098 Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'driver/ppc/sn5s330.h')
-rw-r--r--driver/ppc/sn5s330.h9
1 files changed, 9 insertions, 0 deletions
diff --git a/driver/ppc/sn5s330.h b/driver/ppc/sn5s330.h
index cfb7bf7c96..94d0ab0f1e 100644
--- a/driver/ppc/sn5s330.h
+++ b/driver/ppc/sn5s330.h
@@ -144,6 +144,15 @@ enum sn5s330_pp_idx {
#define SN5S330_VCONN_ILIM (1 << 1)
/*
+ * INT_MASK_RISE/FALL_EDGE2
+ *
+ * The OV_CC1_CON/OV_CC2_CON bit indicates an over-voltage occurred on
+ * C_CC1/C_CC2.
+ */
+#define SN5S330_CC1_CON (1 << 2)
+#define SN5S330_CC2_CON (1 << 3)
+
+/*
* INT_MASK_RISE/FALL_EDGE_3
*
* The VBUS_GOOD bit indicates VBUS has increased beyond a 4.0V threshold.