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| author | Caveh Jalali <caveh@chromium.org> | 2022-01-25 19:19:50 -0800 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2022-01-28 03:23:08 +0000 |
| commit | fcfd48563010b4ff173f0f5ef980d8f1f9186f48 (patch) | |
| tree | ad55d42c6730d74e34884f77c0e339ab45144c8c /driver/ppc/syv682x.c | |
| parent | 6dbbd8cfdaab9b946dd013fdfb4568b6ee8c8f04 (diff) | |
| download | chrome-ec-fcfd48563010b4ff173f0f5ef980d8f1f9186f48.tar.gz | |
ppc/syv682x: Allow FRS GPIOs to be on IO expander
Some boards use GPIOs on IO expanders instead of regular GPIOs to
control FRS. So, switch to an alternate API that allows both types of
GPIOs to be specified.
BRANCH=none
BUG=b:216410108
TEST=buildall passes
Change-Id: I50ce17398cc98c4eeef76e3f3b69365f56fe0f96
Signed-off-by: Caveh Jalali <caveh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3417010
Reviewed-by: Keith Short <keithshort@chromium.org>
Diffstat (limited to 'driver/ppc/syv682x.c')
| -rw-r--r-- | driver/ppc/syv682x.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/driver/ppc/syv682x.c b/driver/ppc/syv682x.c index 5e0ad344cd..cb0f2a0d22 100644 --- a/driver/ppc/syv682x.c +++ b/driver/ppc/syv682x.c @@ -204,7 +204,7 @@ static int syv682x_vbus_source_enable(int port, int enable) */ regval |= SYV682X_CONTROL_1_PWR_ENB; if (IS_ENABLED(CONFIG_USB_PD_FRS_PPC)) - gpio_set_level(ppc_chips[port].frs_en, 0); + gpio_or_ioex_set_level(ppc_chips[port].frs_en, 0); } rv = write_reg(port, SYV682X_CONTROL_1_REG, regval); @@ -656,7 +656,7 @@ static int syv682x_set_frs_enable(int port, int enable) SYV682X_CONTROL_4_CC1_BPS; /* set GPIO after configuring */ write_reg(port, SYV682X_CONTROL_4_REG, regval); - gpio_set_level(ppc_chips[port].frs_en, 1); + gpio_or_ioex_set_level(ppc_chips[port].frs_en, 1); } else { /* * Reconnect CC lines to TCPC. Since the FRS GPIO needs to be @@ -667,7 +667,7 @@ static int syv682x_set_frs_enable(int port, int enable) regval |= SYV682X_CONTROL_4_CC1_BPS | SYV682X_CONTROL_4_CC2_BPS; write_reg(port, SYV682X_CONTROL_4_REG, regval); if (!(flags[port] & SYV682X_FLAGS_FRS)) - gpio_set_level(ppc_chips[port].frs_en, 0); + gpio_or_ioex_set_level(ppc_chips[port].frs_en, 0); } return EC_SUCCESS; } @@ -731,7 +731,7 @@ static int syv682x_init(int port) * Disable FRS prior to configuring the power paths */ if (IS_ENABLED(CONFIG_USB_PD_FRS_PPC)) - gpio_set_level(ppc_chips[port].frs_en, 0); + gpio_or_ioex_set_level(ppc_chips[port].frs_en, 0); if (!syv682x_is_sink(control_1) || (status & SYV682X_STATUS_VSAFE_0V)) { |