Use 7bit I2C/SPI slave addresses in EC

Opt for 7bit slave addresses in EC code.  If 8bit is
expected by a driver, make it local and show this in
the naming.

Use __7b, __7bf and __8b as name extensions for i2c/spi
addresses used in the EC codebase.  __7b indicates a
7bit address by itself.  __7bf indicates a 7bit address
with optional flags attached.  __8b indicates a 8bit
address by itself.

Allow space for 10bit addresses, even though this is
not currently being used by any of our attached
devices.

These extensions are for verification purposes only and
will be removed in the last pass of this ticket. I want
to make sure the variable names reflect the type to help
eliminate future 7/8/7-flags confusion.

BUG=chromium:971296
BRANCH=none
TEST=make buildall -j

Change-Id: I2fc3d1b52ce76184492b2aaff3060f486ca45f45
Signed-off-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1699893
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>

6 files changed, 79 insertions, 71 deletions

diff --git a/driver/ppc/nx20p348x.c b/driver/ppc/nx20p348x.c
index aae4e18f56..fc234539de 100644
--- a/driver/ppc/nx20p348x.c
+++ b/driver/ppc/nx20p348x.c
@@ -32,16 +32,16 @@ static uint8_t flags[CONFIG_USB_PD_PORT_COUNT];
 
 static int read_reg(uint8_t port, int reg, int *regval)
 {
-	return i2c_read8(ppc_chips[port].i2c_port,
-			 ppc_chips[port].i2c_addr,
+	return i2c_read8__7bf(ppc_chips[port].i2c_port,
+			 ppc_chips[port].i2c_addr__7bf,
 			 reg,
 			 regval);
 }
 
 static int write_reg(uint8_t port, int reg, int regval)
 {
-	return i2c_write8(ppc_chips[port].i2c_port,
-			  ppc_chips[port].i2c_addr,
+	return i2c_write8__7bf(ppc_chips[port].i2c_port,
+			  ppc_chips[port].i2c_addr__7bf,
 			  reg,
 			  regval);
 }
diff --git a/driver/ppc/nx20p348x.h b/driver/ppc/nx20p348x.h
index 531842d766..a04868c732 100644
--- a/driver/ppc/nx20p348x.h
+++ b/driver/ppc/nx20p348x.h
@@ -8,15 +8,15 @@
 #ifndef __CROS_EC_NX20P348X_H
 #define __CROS_EC_NX20P348X_H
 
-#define NX20P3483_ADDR0 0xE0
-#define NX20P3483_ADDR1 0xE2
-#define NX20P3483_ADDR2 0xE4
-#define NX20P3483_ADDR3 0xE6
-
-#define NX20P3481_ADDR0 0xE8
-#define NX20P3481_ADDR1 0xEA
-#define NX20P3481_ADDR2 0xEC
-#define NX20P3481_ADDR3 0xEE
+#define NX20P3483_ADDR0__7bf (0x70)
+#define NX20P3483_ADDR1__7bf (0x71)
+#define NX20P3483_ADDR2__7bf (0x72)
+#define NX20P3483_ADDR3__7bf (0x73)
+
+#define NX20P3481_ADDR0__7bf (0x74)
+#define NX20P3481_ADDR1__7bf (0x75)
+#define NX20P3481_ADDR2__7bf (0x76)
+#define NX20P3481_ADDR3__7bf (0x77)
 
 /*
  * This PPC hard-codes the over voltage protect of Vbus at 6.8V in dead-battery
diff --git a/driver/ppc/sn5s330.c b/driver/ppc/sn5s330.c
index 98c2641440..5cfbace742 100644
--- a/driver/ppc/sn5s330.c
+++ b/driver/ppc/sn5s330.c
@@ -31,16 +31,16 @@ static int source_enabled[CONFIG_USB_PD_PORT_COUNT];
 
 static int read_reg(uint8_t port, int reg, int *regval)
 {
-	return i2c_read8(ppc_chips[port].i2c_port,
-			 ppc_chips[port].i2c_addr,
+	return i2c_read8__7bf(ppc_chips[port].i2c_port,
+			 ppc_chips[port].i2c_addr__7bf,
 			 reg,
 			 regval);
 }
 
 static int write_reg(uint8_t port, int reg, int regval)
 {
-	return i2c_write8(ppc_chips[port].i2c_port,
-			  ppc_chips[port].i2c_addr,
+	return i2c_write8__7bf(ppc_chips[port].i2c_port,
+			  ppc_chips[port].i2c_addr__7bf,
 			  reg,
 			  regval);
 }
@@ -78,12 +78,12 @@ static int sn5s330_dump(int port)
 	int i;
 	int data;
 	const int i2c_port = ppc_chips[port].i2c_port;
-	const int i2c_addr = ppc_chips[port].i2c_addr;
+	const uint16_t i2c_addr__7bf = ppc_chips[port].i2c_addr__7bf;
 
 	/* Flush after every set otherwise console buffer may get full. */
 
 	for (i = SN5S330_FUNC_SET1; i <= SN5S330_FUNC_SET12; i++) {
-		i2c_read8(i2c_port, i2c_addr, i, &data);
+		i2c_read8__7bf(i2c_port, i2c_addr__7bf, i, &data);
 		ccprintf("FUNC_SET%d [%02Xh] = 0x%02x\n",
 			 i - SN5S330_FUNC_SET1 + 1,
 			 i,
@@ -93,7 +93,7 @@ static int sn5s330_dump(int port)
 	cflush();
 
 	for (i = SN5S330_INT_STATUS_REG1; i <= SN5S330_INT_STATUS_REG4; i++) {
-		i2c_read8(i2c_port, i2c_addr, i, &data);
+		i2c_read8__7bf(i2c_port, i2c_addr__7bf, i, &data);
 		ccprintf("INT_STATUS_REG%d [%02Xh] = 0x%02x\n",
 			 i - SN5S330_INT_STATUS_REG1 + 1,
 			 i,
@@ -104,7 +104,7 @@ static int sn5s330_dump(int port)
 
 	for (i = SN5S330_INT_TRIP_RISE_REG1; i <= SN5S330_INT_TRIP_RISE_REG3;
 	     i++) {
-		i2c_read8(i2c_port, i2c_addr, i, &data);
+		i2c_read8__7bf(i2c_port, i2c_addr__7bf, i, &data);
 		ccprintf("INT_TRIP_RISE_REG%d [%02Xh] = 0x%02x\n",
 			 i - SN5S330_INT_TRIP_RISE_REG1 + 1,
 			 i,
@@ -115,7 +115,7 @@ static int sn5s330_dump(int port)
 
 	for (i = SN5S330_INT_TRIP_FALL_REG1; i <= SN5S330_INT_TRIP_FALL_REG3;
 	     i++) {
-		i2c_read8(i2c_port, i2c_addr, i, &data);
+		i2c_read8__7bf(i2c_port, i2c_addr__7bf, i, &data);
 		ccprintf("INT_TRIP_FALL_REG%d [%02Xh] = 0x%02x\n",
 			 i - SN5S330_INT_TRIP_FALL_REG1 + 1,
 			 i,
@@ -126,7 +126,7 @@ static int sn5s330_dump(int port)
 
 	for (i = SN5S330_INT_MASK_RISE_REG1; i <= SN5S330_INT_MASK_RISE_REG3;
 	     i++) {
-		i2c_read8(i2c_port, i2c_addr, i, &data);
+		i2c_read8__7bf(i2c_port, i2c_addr__7bf, i, &data);
 		ccprintf("INT_MASK_RISE_REG%d [%02Xh] = 0x%02x\n",
 			 i - SN5S330_INT_MASK_RISE_REG1 + 1,
 			 i,
@@ -137,7 +137,7 @@ static int sn5s330_dump(int port)
 
 	for (i = SN5S330_INT_MASK_FALL_REG1; i <= SN5S330_INT_MASK_FALL_REG3;
 	     i++) {
-		i2c_read8(i2c_port, i2c_addr, i, &data);
+		i2c_read8__7bf(i2c_port, i2c_addr__7bf, i, &data);
 		ccprintf("INT_MASK_FALL_REG%d [%02Xh] = 0x%02x\n",
 			 i - SN5S330_INT_MASK_FALL_REG1 + 1,
 			 i,
@@ -184,7 +184,7 @@ static int sn5s330_init(int port)
 	int retries;
 	int reg;
 	const int i2c_port  = ppc_chips[port].i2c_port;
-	const int i2c_addr = ppc_chips[port].i2c_addr;
+	const uint16_t i2c_addr__7bf = ppc_chips[port].i2c_addr__7bf;
 
 #ifdef CONFIG_USB_PD_MAX_SINGLE_SOURCE_CURRENT
 	/* Set the sourcing current limit value. */
@@ -211,8 +211,8 @@ static int sn5s330_init(int port)
 	 */
 	retries = 0;
 	do {
-		status = i2c_write8(i2c_port, i2c_addr, SN5S330_FUNC_SET1,
-				    regval);
+		status = i2c_write8__7bf(i2c_port, i2c_addr__7bf,
+				    SN5S330_FUNC_SET1, regval);
 		if (status) {
 			CPRINTS("ppc p%d: Failed to set FUNC_SET1! Retrying..",
 				port);
@@ -225,21 +225,24 @@ static int sn5s330_init(int port)
 
 	/* Set Vbus OVP threshold to ~22.325V. */
 	regval = 0x37;
-	status = i2c_write8(i2c_port, i2c_addr, SN5S330_FUNC_SET5, regval);
+	status = i2c_write8__7bf(i2c_port, i2c_addr__7bf,
+			    SN5S330_FUNC_SET5, regval);
 	if (status) {
 		CPRINTS("ppc p%d: Failed to set FUNC_SET5!", port);
 		return status;
 	}
 
 	/* Set Vbus UVP threshold to ~2.75V. */
-	status = i2c_read8(i2c_port, i2c_addr, SN5S330_FUNC_SET6, &regval);
+	status = i2c_read8__7bf(i2c_port, i2c_addr__7bf,
+			   SN5S330_FUNC_SET6, &regval);
 	if (status) {
 		CPRINTS("ppc p%d: Failed to read FUNC_SET6!", port);
 		return status;
 	}
 	regval &= ~0x3F;
 	regval |= 1;
-	status = i2c_write8(i2c_port, i2c_addr, SN5S330_FUNC_SET6, regval);
+	status = i2c_write8__7bf(i2c_port, i2c_addr__7bf,
+			    SN5S330_FUNC_SET6, regval);
 	if (status) {
 		CPRINTS("ppc p%d: Failed to write FUNC_SET6!", port);
 		return status;
@@ -247,7 +250,8 @@ static int sn5s330_init(int port)
 
 	/* Enable SBU Fets and set PP2 current limit to ~3A. */
 	regval = SN5S330_SBU_EN | 0x8;
-	status = i2c_write8(i2c_port, i2c_addr, SN5S330_FUNC_SET2, regval);
+	status = i2c_write8__7bf(i2c_port, i2c_addr__7bf,
+			    SN5S330_FUNC_SET2, regval);
 	if (status) {
 		CPRINTS("ppc p%d: Failed to set FUNC_SET2!", port);
 		return status;
@@ -266,7 +270,8 @@ static int sn5s330_init(int port)
 	 * low voltage protection).
 	 */
 	regval = SN5S330_OVP_EN_CC | SN5S330_PP2_CONFIG | SN5S330_CONFIG_UVP;
-	status = i2c_write8(i2c_port, i2c_addr, SN5S330_FUNC_SET9, regval);
+	status = i2c_write8__7bf(i2c_port, i2c_addr__7bf,
+			    SN5S330_FUNC_SET9, regval);
 	if (status) {
 		CPRINTS("ppc p%d: Failed to set FUNC_SET9!", port);
 		return status;
@@ -274,8 +279,8 @@ static int sn5s330_init(int port)
 
 	/* Set analog current limit delay to 200 us for both PP1 & PP2. */
 	regval = (PPX_ILIM_DEGLITCH_0_US_200 << 3) | PPX_ILIM_DEGLITCH_0_US_200;
-	status = i2c_write8(i2c_port, i2c_addr, SN5S330_FUNC_SET11,
-			    regval);
+	status = i2c_write8__7bf(i2c_port, i2c_addr__7bf,
+			    SN5S330_FUNC_SET11, regval);
 	if (status) {
 		CPRINTS("ppc p%d: Failed to set FUNC_SET11", port);
 		return status;
@@ -288,14 +293,16 @@ static int sn5s330_init(int port)
 	 * reset default (20 us).
 	 */
 	regval = 0;
-	status = i2c_read8(i2c_port, i2c_addr, SN5S330_FUNC_SET8, &regval);
+	status = i2c_read8__7bf(i2c_port, i2c_addr__7bf,
+			   SN5S330_FUNC_SET8, &regval);
 	if (status) {
 		CPRINTS("ppc p%d: Failed to read FUNC_SET8!", port);
 		return status;
 	}
 	regval &= ~SN5S330_VCONN_DEGLITCH_MASK;
 	regval |= SN5S330_VCONN_DEGLITCH_640_US;
-	status = i2c_write8(i2c_port, i2c_addr, SN5S330_FUNC_SET8, regval);
+	status = i2c_write8__7bf(i2c_port, i2c_addr__7bf,
+			    SN5S330_FUNC_SET8, regval);
 	if (status) {
 		CPRINTS("ppc p%d: Failed to set FUNC_SET8!", port);
 		return status;
@@ -347,8 +354,8 @@ static int sn5s330_init(int port)
 	 * is checked below.
 	 */
 	regval = SN5S330_DIG_RES | SN5S330_VSAFE0V_MASK;
-	status = i2c_write8(i2c_port, i2c_addr, SN5S330_INT_STATUS_REG4,
-			    regval);
+	status = i2c_write8__7bf(i2c_port, i2c_addr__7bf,
+			    SN5S330_INT_STATUS_REG4, regval);
 	if (status) {
 		CPRINTS("ppc p%d: Failed to write INT_STATUS_REG4!", port);
 		return status;
@@ -365,30 +372,30 @@ static int sn5s330_init(int port)
 	 */
 
 	regval = ~SN5S330_ILIM_PP1_MASK;
-	status = i2c_write8(i2c_port, i2c_addr, SN5S330_INT_MASK_RISE_REG1,
-			    regval);
+	status = i2c_write8__7bf(i2c_port, i2c_addr__7bf,
+			    SN5S330_INT_MASK_RISE_REG1, regval);
 	if (status) {
 		CPRINTS("ppc p%d: Failed to write INT_MASK_RISE1!", port);
 		return status;
 	}
 
-	status = i2c_write8(i2c_port, i2c_addr, SN5S330_INT_MASK_FALL_REG1,
-			    regval);
+	status = i2c_write8__7bf(i2c_port, i2c_addr__7bf,
+			    SN5S330_INT_MASK_FALL_REG1, regval);
 	if (status) {
 		CPRINTS("ppc p%d: Failed to write INT_MASK_FALL1!", port);
 		return status;
 	}
 
 	/* Now mask all the other interrupts. */
-	status = i2c_write8(i2c_port, i2c_addr, SN5S330_INT_MASK_RISE_REG2,
-			    0xFF);
+	status = i2c_write8__7bf(i2c_port, i2c_addr__7bf,
+			    SN5S330_INT_MASK_RISE_REG2, 0xFF);
 	if (status) {
 		CPRINTS("ppc p%d: Failed to write INT_MASK_RISE2!", port);
 		return status;
 	}
 
-	status = i2c_write8(i2c_port, i2c_addr, SN5S330_INT_MASK_FALL_REG2,
-			    0xFF);
+	status = i2c_write8__7bf(i2c_port, i2c_addr__7bf,
+			    SN5S330_INT_MASK_FALL_REG2, 0xFF);
 	if (status) {
 		CPRINTS("ppc p%d: Failed to write INT_MASK_FALL2!", port);
 		return status;
@@ -401,15 +408,15 @@ static int sn5s330_init(int port)
 	regval = 0xFF;
 #endif  /* CONFIG_USB_PD_VBUS_DETECT_PPC && CONFIG_USB_CHARGER */
 
-	status = i2c_write8(i2c_port, i2c_addr, SN5S330_INT_MASK_RISE_REG3,
-			    regval);
+	status = i2c_write8__7bf(i2c_port, i2c_addr__7bf,
+			    SN5S330_INT_MASK_RISE_REG3, regval);
 	if (status) {
 		CPRINTS("ppc p%d: Failed to write INT_MASK_RISE3!", port);
 		return status;
 	}
 
-	status = i2c_write8(i2c_port, i2c_addr, SN5S330_INT_MASK_FALL_REG3,
-			    regval);
+	status = i2c_write8__7bf(i2c_port, i2c_addr__7bf,
+			    SN5S330_INT_MASK_FALL_REG3, regval);
 	if (status) {
 		CPRINTS("ppc p%d: Failed to write INT_MASK_FALL3!", port);
 		return status;
@@ -419,7 +426,8 @@ static int sn5s330_init(int port)
 	for (reg = SN5S330_INT_TRIP_RISE_REG1;
 	     reg <= SN5S330_INT_TRIP_FALL_REG3;
 	     reg++) {
-		status = i2c_write8(i2c_port, i2c_addr, reg, 0xFF);
+		status = i2c_write8__7bf(i2c_port, i2c_addr__7bf,
+				    reg, 0xFF);
 		if (status) {
 			CPRINTS("ppc p%d: Failed to write reg 0x%2x!", port);
 			return status;
@@ -431,8 +439,8 @@ static int sn5s330_init(int port)
 	 * For PP2, check to see if we booted in dead battery mode.  If we
 	 * booted in dead battery mode, the PP2 FET will already be enabled.
 	 */
-	status = i2c_read8(i2c_port, i2c_addr, SN5S330_INT_STATUS_REG4,
-			   &regval);
+	status = i2c_read8__7bf(i2c_port, i2c_addr__7bf,
+			   SN5S330_INT_STATUS_REG4, &regval);
 	if (status) {
 		CPRINTS("ppc p%d: Failed to read INT_STATUS_REG4!", port);
 		return status;
@@ -443,8 +451,8 @@ static int sn5s330_init(int port)
 		 * Clear the bit by writing 1 and keep vSafe0V_MASK
 		 * unchanged.
 		 */
-		i2c_write8(i2c_port, i2c_addr, SN5S330_INT_STATUS_REG4,
-			   regval);
+		i2c_write8__7bf(i2c_port, i2c_addr__7bf,
+			   SN5S330_INT_STATUS_REG4, regval);
 
 		/* Turn on PP2 FET. */
 		status = sn5s330_pp_fet_enable(port, SN5S330_PP2, 1);
diff --git a/driver/ppc/sn5s330.h b/driver/ppc/sn5s330.h
index 6c79aa46ed..95f8fb4ac7 100644
--- a/driver/ppc/sn5s330.h
+++ b/driver/ppc/sn5s330.h
@@ -12,7 +12,7 @@
 
 struct sn5s330_config {
 	uint8_t i2c_port;
-	uint8_t i2c_addr;
+	uint8_t i2c_addr__7bf;
 };
 
 extern const struct sn5s330_config sn5s330_chips[];
@@ -25,10 +25,10 @@ enum sn5s330_pp_idx {
 	SN5S330_PP_COUNT,
 };
 
-#define SN5S330_ADDR0 0x80
-#define SN5S330_ADDR1 0x82
-#define SN5S330_ADDR2 0x84
-#define SN5S330_ADDR3 0x86
+#define SN5S330_ADDR0__7bf (0x40)
+#define SN5S330_ADDR1__7bf (0x41)
+#define SN5S330_ADDR2__7bf (0x42)
+#define SN5S330_ADDR3__7bf (0x43)
 
 #define SN5S330_FUNC_SET1  0x50
 #define SN5S330_FUNC_SET2  0x51
diff --git a/driver/ppc/syv682x.c b/driver/ppc/syv682x.c
index 24a8b9a3ee..a8f5c146bb 100644
--- a/driver/ppc/syv682x.c
+++ b/driver/ppc/syv682x.c
@@ -23,16 +23,16 @@ static uint8_t flags[CONFIG_USB_PD_PORT_COUNT];
 
 static int read_reg(uint8_t port, int reg, int *regval)
 {
-	return i2c_read8(ppc_chips[port].i2c_port,
-			 ppc_chips[port].i2c_addr,
+	return i2c_read8__7bf(ppc_chips[port].i2c_port,
+			 ppc_chips[port].i2c_addr__7bf,
 			 reg,
 			 regval);
 }
 
 static int write_reg(uint8_t port, int reg, int regval)
 {
-	return i2c_write8(ppc_chips[port].i2c_port,
-			  ppc_chips[port].i2c_addr,
+	return i2c_write8__7bf(ppc_chips[port].i2c_port,
+			  ppc_chips[port].i2c_addr__7bf,
 			  reg,
 			  regval);
 }
@@ -258,11 +258,11 @@ static int syv682x_dump(int port)
 	int data;
 	int rv;
 	const int i2c_port = ppc_chips[port].i2c_port;
-	const int i2c_addr = ppc_chips[port].i2c_addr;
+	const int i2c_addr__7bf = ppc_chips[port].i2c_addr__7bf;
 
 	for (reg_addr = SYV682X_STATUS_REG; reg_addr <= SYV682X_CONTROL_4_REG;
 	     reg_addr++) {
-		rv = i2c_read8(i2c_port, i2c_addr, reg_addr, &data);
+		rv = i2c_read8__7bf(i2c_port, i2c_addr__7bf, reg_addr, &data);
 		if (rv)
 			ccprintf("ppc_syv682[p%d]: Failed to read reg 0x%02x\n",
 				 port, reg_addr);
diff --git a/driver/ppc/syv682x.h b/driver/ppc/syv682x.h
index 98bb67d522..f355fe1cf9 100644
--- a/driver/ppc/syv682x.h
+++ b/driver/ppc/syv682x.h
@@ -8,11 +8,11 @@
 #ifndef __CROS_EC_SYV682X_H
 #define __CROS_EC_SYV682X_H
 
-/* 8 bit I2C addresses */
-#define SYV682X_ADDR0			0x80
-#define SYV682X_ADDR1			0x82
-#define SYV682X_ADDR2			0x84
-#define SYV682x_ADDR3			0x86
+/* I2C addresses */
+#define SYV682X_ADDR0__7bf			0x40
+#define SYV682X_ADDR1__7bf			0x41
+#define SYV682X_ADDR2__7bf			0x42
+#define SYV682x_ADDR3__7bf			0x43
 
 /* SYV682x register addresses */
 #define SYV682X_STATUS_REG		0x00