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author | Aseda Aboagye <aaboagye@google.com> | 2018-09-27 15:00:47 -0700 |
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committer | chrome-bot <chrome-bot@chromium.org> | 2019-03-26 04:42:43 -0700 |
commit | f913d50eb1298f8ad1772ddbe3b9a51b35e08f3c (patch) | |
tree | 88ca6ebd3f155ed6ea74d580a0525a81f2de3eec /driver/ppc | |
parent | 7c3546ef5c8d21c5325ce2255ad44217a5ba7d7d (diff) | |
download | chrome-ec-f913d50eb1298f8ad1772ddbe3b9a51b35e08f3c.tar.gz |
nocturne: Set up SBU FETs properly.
The SBU FET control should be tied to entering/exiting DP Alt Mode and
not the USB MUX position as the previous commit had. However, the SBU
lines are also used for CCD and the older boards don't have the
necessary hardware.
BUG=b:114340064
BRANCH=firmware-nocturne-10984.B
TEST=Flash nocturne; verify that external display works after a reboot.
Verify that cr50 is enumerated using SuzyQable.
TEST=Repeat above test on board rev 1.
Change-Id: I5ab9123816fa6ef946dde95b421c5b89bd9719a4
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1250028
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Scott Collyer <scollyer@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1405611
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Tested-by: Edward Hill <ecgh@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Diffstat (limited to 'driver/ppc')
0 files changed, 0 insertions, 0 deletions