diff options
| author | Rob Barnes <robbarnes@google.com> | 2021-11-10 12:52:52 -0700 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2021-12-16 04:20:44 +0000 |
| commit | 6d41e28fb81db8a664bb64d68e60de91231d3e51 (patch) | |
| tree | 9b6b859522ff59b4f8d769a62654cd55b7cc62fa /driver/sb_rmi.c | |
| parent | 8246bb6ef501c2aff97bc4b3d3856cc0cd3a523f (diff) | |
| download | chrome-ec-6d41e28fb81db8a664bb64d68e60de91231d3e51.tar.gz | |
driver/sb_rmi: Do not clear interrupt after transaction
Do not clear software interrupt after transaction or error. This aligns
with AMD guidance.
BUG=b:205610230
BRANCH=None
TEST=Boot guybrush, no STT errors
Change-Id: I1d6892565572761e84cb1a81f4dc535c90925a09
Signed-off-by: Rob Barnes <robbarnes@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3273094
Reviewed-by: Fanli Zhou <fanliccc@gmail.com>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Diana Z <dzigterman@chromium.org>
Diffstat (limited to 'driver/sb_rmi.c')
| -rw-r--r-- | driver/sb_rmi.c | 13 |
1 files changed, 3 insertions, 10 deletions
diff --git a/driver/sb_rmi.c b/driver/sb_rmi.c index 3bdef03459..a7ceeeead4 100644 --- a/driver/sb_rmi.c +++ b/driver/sb_rmi.c @@ -83,8 +83,7 @@ int sb_rmi_mailbox_xfer(int cmd, uint32_t msg_in, uint32_t *msg_out_ptr) * 8. For a read operation, the initiator (BMC) reads the firmware * response Command Data Out[31:0] from SBRMI::OutBndMsg_inst[4:1] * {SBRMI_x34(MSB):SBRMI_x31(LSB)}. - * 9. Firmware clears the interrupt on SBRMI::SoftwareInterrupt. - * 10. BMC must write 1'b1 to SBRMI::Status[SwAlertSts] to clear the + * 9. BMC must write 1'b1 to SBRMI::Status[SwAlertSts] to clear the * ALERT to initiator (BMC). It is recommended to clear the ALERT * upon completion of the current mailbox command. */ @@ -141,15 +140,12 @@ int sb_rmi_mailbox_xfer(int cmd, uint32_t msg_in, uint32_t *msg_out_ptr) if (!alerted) { CPRINTS("SB-SMI: Mailbox transfer timeout"); - /* Clear interrupt */ - sb_rmi_assert_interrupt(0); return EC_ERROR_TIMEOUT; } RETURN_ERROR(sb_rmi_read(SB_RMI_OUT_BND_MSG0_REG, &val)); if (val != cmd) { CPRINTS("RMI: Unexpected command value in out bound message"); - sb_rmi_assert_interrupt(0); return EC_ERROR_UNKNOWN; } @@ -164,17 +160,14 @@ int sb_rmi_mailbox_xfer(int cmd, uint32_t msg_in, uint32_t *msg_out_ptr) RETURN_ERROR(sb_rmi_read(SB_RMI_OUT_BND_MSG4_REG, &val)); *msg_out_ptr |= val << 24; - /* Step 9: clear SBRMIx40[Software Interrupt] */ - RETURN_ERROR(sb_rmi_assert_interrupt(0)); - /** - * Step 10: BMC must write 1'b1 to SBRMI::Status[SwAlertSts] to clear + * Step 9: BMC must write 1'b1 to SBRMI::Status[SwAlertSts] to clear * the ALERT to initiator (BMC). It is recommended to clear the * ALERT upon completion of the current mailbox command. */ RETURN_ERROR(sb_rmi_write(SB_RMI_STATUS_REG, 0x2)); - /* Step 11: read the return code from OutBndMsg_inst7 (SBRMI_x37) */ + /* Step 10: read the return code from OutBndMsg_inst7 (SBRMI_x37) */ RETURN_ERROR(sb_rmi_read(SB_RMI_OUT_BND_MSG7_REG, &val)); switch (val) { |