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author | Scott Collyer <scollyer@google.com> | 2018-03-30 13:02:34 -0700 |
---|---|---|
committer | chrome-bot <chrome-bot@chromium.org> | 2018-04-13 13:25:13 -0700 |
commit | 1e677d3f32155265f062a9011e553b39ad9dac50 (patch) | |
tree | 6f5b49de5039f9a214de8055080040bec7377dbf /driver/tcpm/anx7447.h | |
parent | 4bfde23411b1e335a86e9c5521539df67a2bbadb (diff) | |
download | chrome-ec-1e677d3f32155265f062a9011e553b39ad9dac50.tar.gz |
anx7447: Add functions to the anx7447 driver to check/erase OCM flash
This CL adds support to check if the OCM flash is erased and if not,
will erase it at initialization time. These changes are encapsulated
in a new config option CONFIG_USB_PD_TCPM_ANX7447_OCM_ERASE and this
option is enabled for Yorp boards.
BUG=b:77658388
BRANCH=NONE
TEST=make -j buildall. Tested on a board that hadn't yet been
erased. Verifed the message
"anx7447: OCM flash checked and successfully erased"
was in the EC log, but did not show up on subsequent reboots.
Change-Id: I660e76a9498d3dc1ba821a04317b324f716c5089
Signed-off-by: Scott Collyer <scollyer@google.com>
Reviewed-on: https://chromium-review.googlesource.com/988414
Commit-Ready: Jett Rink <jettrink@chromium.org>
Tested-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Diffstat (limited to 'driver/tcpm/anx7447.h')
-rw-r--r-- | driver/tcpm/anx7447.h | 41 |
1 files changed, 41 insertions, 0 deletions
diff --git a/driver/tcpm/anx7447.h b/driver/tcpm/anx7447.h index a2fe128f77..eac4057967 100644 --- a/driver/tcpm/anx7447.h +++ b/driver/tcpm/anx7447.h @@ -31,6 +31,47 @@ #define ANX7447_REG_INTP_CTRL_0 0x9E +/* + * This section of defines are only required to support the config option + * CONFIG_USB_PD_TCPM_ANX7447_OCM_ERASE. + */ +/* SPI registers used for OCM flash operations */ +#define ANX7447_DELAY_IN_US (20*1000) + +#define ANX7447_REG_R_RAM_CTRL 0x05 +#define ANX7447_REG_R_FLASH_RW_CTRL 0x30 +#define ANX7447_REG_R_FLASH_STATUS_0 0x31 +#define ANX7447_REG_FLASH_INST_TYPE 0x33 +#define ANX7447_REG_FLASH_ERASE_TYPE 0x34 +#define ANX7447_REG_OCM_CTRL_0 0x6E +#define ANX7447_REG_ADDR_GPIO_CTRL_0 0x88 +#define ANX7447_REG_OCM_VERSION 0xB4 + +/* R_RAM_CTRL bit definitions */ +#define ANX7447_R_RAM_CTRL_FLASH_DONE (1<<7) + +/* R_FLASH_RW_CTRL bit definitions */ +#define ANX7447_R_FLASH_RW_CTRL_GENERAL_INST_EN (1<<6) +#define ANX7447_R_FLASH_RW_CTRL_FLASH_ERASE_EN (1<<5) +#define ANX7447_R_FLASH_RW_CTRL_WRITE_STATUS_EN (1<<2) +#define ANX7447_R_FLASH_RW_CTRL_FLASH_READ (1<<1) +#define ANX7447_R_FLASH_RW_CTRL_FLASH_WRITE (1<<0) + +/* R_FLASH_STATUS_0 definitions */ +#define ANX7447_FLASH_STATUS_SPI_STATUS_0 0x43 + +/* FLASH_ERASE_TYPE bit definitions */ +#define ANX7447_FLASH_INST_TYPE_WRITEENABLE 0x06 +#define ANX7447_FLASH_ERASE_TYPE_CHIPERASE 0x60 + +/* OCM_CTRL_0 bit definitions */ +#define ANX7447_OCM_CTRL_OCM_RESET (1<<6) + +/* ADDR_GPIO_CTRL_0 bit definitions */ +#define ANX7447_ADDR_GPIO_CTRL_0_SPI_WP (1<<7) +#define ANX7447_ADDR_GPIO_CTRL_0_SPI_CLK_ENABLE (1<<6) +/* End of defines used for CONFIG_USB_PD_TCPM_ANX7447_OCM_ERASE */ + struct anx7447_i2c_addr { int tcpc_slave_addr; int spi_slave_addr; |