diff options
author | Wai-Hong Tam <waihong@google.com> | 2018-10-15 14:22:46 -0700 |
---|---|---|
committer | chrome-bot <chrome-bot@chromium.org> | 2019-01-11 13:32:24 -0800 |
commit | d3e653e5d41cbadcf40c5449841b475708f18dc8 (patch) | |
tree | 0d8138599315c73121e7fd0729c5c614f0a9795c /driver/tcpm/anx74xx.h | |
parent | 7b99b74ba5463c886200ea827579f7ac1b6a35d2 (diff) | |
download | chrome-ec-d3e653e5d41cbadcf40c5449841b475708f18dc8.tar.gz |
anx74xx: Rename the registers to more meaningful
Rename the registers which configures the internal switches.
No logic change.
BRANCH=None
BUG=b:116879483
TEST=None. No logic change.
Change-Id: I10bcbc7d0da1b8e97be0811b8f3a188037c5d68c
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1282004
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Diffstat (limited to 'driver/tcpm/anx74xx.h')
-rw-r--r-- | driver/tcpm/anx74xx.h | 22 |
1 files changed, 13 insertions, 9 deletions
diff --git a/driver/tcpm/anx74xx.h b/driver/tcpm/anx74xx.h index 09d3e36771..deaebf3f1d 100644 --- a/driver/tcpm/anx74xx.h +++ b/driver/tcpm/anx74xx.h @@ -106,15 +106,19 @@ #define ANX74XX_REG_ANALOG_CTRL_11 0x4c #define ANX74XX_REG_ANALOG_CTRL_12 0x4d -#define ANX74XX_REG_MUX_DP_MODE_ACE_CC1 0x49 -#define ANX74XX_REG_MUX_DP_MODE_ACE_CC2 0x86 -#define ANX74XX_REG_MUX_DP_MODE_BDF_CC1 0x61 -#define ANX74XX_REG_MUX_DP_MODE_BDF_CC2 0x92 - -#define ANX74XX_REG_MUX_ML2_B (1 << 4) -#define ANX74XX_REG_MUX_ML2_A (1 << 5) -#define ANX74XX_REG_MUX_SSTX_B (1 << 6) -#define ANX74XX_REG_MUX_SSTX_A (1 << 7) +#define ANX74XX_REG_MUX_ML0_RX2 (1 << 0) +#define ANX74XX_REG_MUX_ML0_RX1 (1 << 1) +#define ANX74XX_REG_MUX_ML3_RX2 (1 << 2) +#define ANX74XX_REG_MUX_ML3_RX1 (1 << 3) +#define ANX74XX_REG_MUX_SSRX_RX2 (1 << 4) +#define ANX74XX_REG_MUX_SSRX_RX1 (1 << 5) +#define ANX74XX_REG_MUX_ML1_TX2 (1 << 6) +#define ANX74XX_REG_MUX_ML1_TX1 (1 << 7) + +#define ANX74XX_REG_MUX_ML2_TX2 (1 << 4) +#define ANX74XX_REG_MUX_ML2_TX1 (1 << 5) +#define ANX74XX_REG_MUX_SSTX_TX2 (1 << 6) +#define ANX74XX_REG_MUX_SSTX_TX1 (1 << 7) #define ANX74XX_REG_CC_SOFTWARE_CTRL 0x4a #define ANX74XX_REG_CC_SW_CTRL_ENABLE 0x01 |