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author | Denis Brockus <dbrockus@chromium.org> | 2019-06-25 12:44:16 -0600 |
---|---|---|
committer | Commit Bot <commit-bot@chromium.org> | 2019-07-19 21:11:02 +0000 |
commit | d1a18f82ed831d4e640336ff5571f5fa64bc7b36 (patch) | |
tree | c46aeb6136de1c27c66e3d5f662e9620161bef7b /driver/tcpm/anx7688.c | |
parent | 1f14229fa7e499dfcee07d17add187598ff0a46c (diff) | |
download | chrome-ec-d1a18f82ed831d4e640336ff5571f5fa64bc7b36.tar.gz |
Use 7bit I2C/SPI slave addresses in EC
Opt for 7bit slave addresses in EC code. If 8bit is
expected by a driver, make it local and show this in
the naming.
Use __7b, __7bf and __8b as name extensions for i2c/spi
addresses used in the EC codebase. __7b indicates a
7bit address by itself. __7bf indicates a 7bit address
with optional flags attached. __8b indicates a 8bit
address by itself.
Allow space for 10bit addresses, even though this is
not currently being used by any of our attached
devices.
These extensions are for verification purposes only and
will be removed in the last pass of this ticket. I want
to make sure the variable names reflect the type to help
eliminate future 7/8/7-flags confusion.
BUG=chromium:971296
BRANCH=none
TEST=make buildall -j
Change-Id: I2fc3d1b52ce76184492b2aaff3060f486ca45f45
Signed-off-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1699893
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Diffstat (limited to 'driver/tcpm/anx7688.c')
-rw-r--r-- | driver/tcpm/anx7688.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/driver/tcpm/anx7688.c b/driver/tcpm/anx7688.c index bac65892de..4ea0602483 100644 --- a/driver/tcpm/anx7688.c +++ b/driver/tcpm/anx7688.c @@ -21,7 +21,7 @@ #define ANX7688_REG_HPD_IRQ BIT(1) #define ANX7688_REG_HPD_ENABLE BIT(2) -#define ANX7688_USBC_ADDR 0x50 +#define ANX7688_USBC_ADDR__7bf 0x28 #define ANX7688_REG_RAMCTRL 0xe7 #define ANX7688_REG_RAMCTRL_BOOT_DONE BIT(6) @@ -39,7 +39,7 @@ static int anx7688_init(int port) * 100ms to follow cts. */ while (1) { - rv = i2c_read8(I2C_PORT_TCPC, ANX7688_USBC_ADDR, + rv = i2c_read8__7bf(I2C_PORT_TCPC, ANX7688_USBC_ADDR__7bf, ANX7688_REG_RAMCTRL, &mask); if (rv == EC_SUCCESS && (mask & ANX7688_REG_RAMCTRL_BOOT_DONE)) @@ -174,7 +174,7 @@ static int anx7688_tcpm_get_vbus_level(int port) * Therefore, we use a proprietary register to read the unfiltered VBus * value. See crosbug.com/p/55221 . */ - i2c_read8(I2C_PORT_TCPC, 0x50, 0x40, ®); + i2c_read8__7bf(I2C_PORT_TCPC, 0x28, 0x40, ®); return ((reg & 0x10) ? 1 : 0); } #endif |