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authorRuibin Chang <ruibin.chang@ite.com.tw>2020-07-21 14:32:35 +0800
committerCommit Bot <commit-bot@chromium.org>2020-07-23 06:58:02 +0000
commit0f982a35e978febfc1bab45d1afc048e0c78968a (patch)
tree3c28abbc9e7b59360f5bb4136b59a07de9fd459e /driver/tcpm/it8xxx2.c
parent45563a8fc966d6ba9d6788d8ab04dcfdf71a669d (diff)
downloadchrome-ec-0f982a35e978febfc1bab45d1afc048e0c78968a.tar.gz
chip/it8320, it81202: Implement fast role swap function
Implement fast role swap function from initial SNK to new SRC for chip it8320 and it81202. BUG=none BRANCH=none TEST=1.When we detect FRS cc low signal, we can output properly GPIO signal. 2.FRS false-positives test: PD traffic(ex.power nego, data and power swap, soft and hard reset) on the CC line after FRS is enabled. Change-Id: I3a7bc6a684e57fb19e50c41305751b2fca1ffe2d Signed-off-by: Ruibin Chang <Ruibin.Chang@ite.com.tw> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1786462 Reviewed-by: Diana Z <dzigterman@chromium.org>
Diffstat (limited to 'driver/tcpm/it8xxx2.c')
-rw-r--r--driver/tcpm/it8xxx2.c45
1 files changed, 45 insertions, 0 deletions
diff --git a/driver/tcpm/it8xxx2.c b/driver/tcpm/it8xxx2.c
index 82a903a272..10ca883c10 100644
--- a/driver/tcpm/it8xxx2.c
+++ b/driver/tcpm/it8xxx2.c
@@ -585,6 +585,48 @@ static int it83xx_tcpm_get_chip_info(int port, int live,
return EC_SUCCESS;
}
+#ifdef CONFIG_USB_PD_FRS_TCPC
+static int it83xx_tcpm_set_frs_enable(int port, int enable)
+{
+ uint8_t mask = (USBPD_REG_FAST_SWAP_REQUEST_ENABLE |
+ USBPD_REG_FAST_SWAP_DETECT_ENABLE);
+
+ if (enable) {
+ /*
+ * Disable HW auto turn off FRS requestion and detection
+ * when we receive soft or hard reset.
+ */
+ IT83XX_USBPD_PDMSR(port) &= ~USBPD_REG_MASK_AUTO_FRS_DISABLE;
+ /* W/C status */
+ IT83XX_USBPD_IFS(port) = 0x33;
+ /* Enable FRS detection (cc to GND) interrupt */
+ IT83XX_USBPD_MIFS(port) &= ~(USBPD_REG_MASK_FAST_SWAP_ISR |
+ USBPD_REG_MASK_FAST_SWAP_DETECT_ISR);
+ /* Enable FRS detection (cc to GND) */
+ IT83XX_USBPD_PDFSCR(port) = (IT83XX_USBPD_PDFSCR(port) & ~mask)
+ | USBPD_REG_FAST_SWAP_DETECT_ENABLE;
+ /*
+ * TODO(b/160210457): Enable HW auto trigger
+ * GPH3(port0)/GPH4(port1) output H/L after we detect FRS cc
+ * low signal.
+ */
+ } else {
+ /* Disable FRS detection (cc to GND) interrupt */
+ IT83XX_USBPD_MIFS(port) |= (USBPD_REG_MASK_FAST_SWAP_ISR |
+ USBPD_REG_MASK_FAST_SWAP_DETECT_ISR);
+ /* Disable FRS detection and requestion */
+ IT83XX_USBPD_PDFSCR(port) &= ~mask;
+ /*
+ * TODO(b/160210457): Disable HW auto trigger
+ * GPH3(port0)/GPH4(port1) output H/L after we detect FRS cc
+ * low signal.
+ */
+ }
+
+ return EC_SUCCESS;
+}
+#endif
+
static void it83xx_init(enum usbpd_port port, int role)
{
uint8_t cc_config = (port == USBPD_PORT_C ?
@@ -675,4 +717,7 @@ const struct tcpm_drv it83xx_tcpm_drv = {
.get_message_raw = &it83xx_tcpm_get_message_raw,
.transmit = &it83xx_tcpm_transmit,
.get_chip_info = &it83xx_tcpm_get_chip_info,
+#ifdef CONFIG_USB_PD_FRS_TCPC
+ .set_frs_enable = &it83xx_tcpm_set_frs_enable,
+#endif
};