Merge remote-tracking branch cros/main into firmware-fpmcu-dartmonkey-releasefirmware-fpmcu-dartmonkey-release

Generated by: ./util/update_release_branch.py --board dartmonkey --relevant_paths_file
./util/fingerprint-relevant-paths.txt firmware-fpmcu-dartmonkey-release

Relevant changes:

git log --oneline 6c1587ca70..28712dae9d -- board/nocturne_fp
board/dartmonkey common/fpsensor docs/fingerprint driver/fingerprint
util/getversion.sh

ded9307b79 util/getversion.sh: Fix version when not in a git repo
956055e692 board: change Google USB vendor info
71b2ef709d Update license boilerplate text in source code files
33e11afda0 Revert "fpsensor: Build fpsensor source file with C++"
c8d0360723 fpsensor: Build fpsensor source file with C++
bc113abd53 fpsensor: Fix g++ compiler error
150a58a0dc fpsensor: Fix fp_set_sensor_mode return type
b33b5ce85b fpsensor: Remove nested designators for C++ compatibility
2e864b2539 tree-wide: const-ify argv for console commands
56d8b360f9 test: Add test for get ikm failure when seed not set
3a3d6c3690 test: Add test for fpsensor trivial key failure
233e6bbd08 fpsensor_crypto: Abstract calls to hmac_SHA256
0a041b285b docs/fingerprint: Typo correction
c03fab67e2 docs/fingerprint: Fix the path of fputils.py
0b5d4baf5a util/getversion.sh: Fix empty file list handling
6e128fe760 FPMCU dev board environment with Satlab
3eb29b6aa5 builtin: Move ssize_t to sys/types.h
345d62ebd1 docs/fingerprint: Update power numbers for latest dartmonkey release
c25ffdb316 common: Conditionally support printf %l and %i modifiers
9a3c514b45 test: Add a test to check if the debugger is connected
54e603413f Move standard library tests to their own file
43fa6b4bf8 docs/fingerprint: Update power numbers for latest bloonchipper release
25536f9a84 driver/fingerprint/fpc/bep/fpc_sensor_spi.c: Format with clang-format
4face99efd driver/fingerprint/fpc/libfp/fpc_sensor_pal.h: Format with clang-format
738de2b575 trng: Rename rand to trng_rand
14b8270edd docs/fingerprint: Update dragonclaw power numbers
0b268f93d1 driver/fingerprint/fpc/libfp/fpc_private.c: Format with clang-format
f80da163f2 driver/fingerprint/fpc/libfp/fpc_private.h: Format with clang-format
a0751778f4 board/nocturne_fp/ro_workarounds.c: Format with clang-format
5e9c85c9b1 driver/fingerprint/fpc/libfp/fpc_sensor_pal.c: Format with clang-format
c1f9dd3cf8 driver/fingerprint/fpc/libfp/fpc_bio_algorithm.h: Format with clang-format
eb1e1bed8d driver/fingerprint/fpc/libfp/fpc1145_private.h: Format with clang-format
6e7b611821 driver/fingerprint/fpc/bep/fpc_bio_algorithm.h: Format with clang-format
e0589cd5e2 driver/fingerprint/fpc/bep/fpc1035_private.h: Format with clang-format
58f0246dbe board/nocturne_fp/board_ro.c: Format with clang-format
7905e556a0 common/fpsensor/fpsensor_crypto.c: Format with clang-format
21289d170c driver/fingerprint/fpc/bep/fpc1025_private.h: Format with clang-format
98a20f937e common/fpsensor/fpsensor_state.c: Format with clang-format
a2d255d8af common/fpsensor/fpsensor.c: Format with clang-format
84e53a65da board/nocturne_fp/board.h: Format with clang-format
73055eeb3f driver/fingerprint/fpc/bep/fpc_private.c: Format with clang-format
0f7b5cb509 common/fpsensor/fpsensor_private.h: Format with clang-format
1ceade6e65 driver/fingerprint/fpc/bep/fpc_private.h: Format with clang-format
dca9d74321 Revert "trng: Rename rand to trng_rand"
a6b0b3554f trng: Rename rand to trng_rand
28d0b75b70 third_party/boringssl: Remove unused header

BRANCH=None
BUG=b:244387210 b:242720240 b:215613183 b:242720910 b:236386294
BUG=b:234181908 b:244781166 b:234781655 b:234143158 b:234181908
BUG=b:237344361 b:236025198 b:234181908 b:180945056 chromium:1098010
BUG=b:246424843 b:234181908 b:131913998
TEST=`make -j buildall`
TEST=./util/run_device_tests.py --board dartmonkey
     Test "aes": PASSED
     Test "cec": PASSED
     Test "cortexm_fpu": PASSED
     Test "crc": PASSED
     Test "flash_physical": PASSED
     Test "flash_write_protect": PASSED
     Test "fpsensor_hw": PASSED
     Test "fpsensor_spi_ro": PASSED
     Test "fpsensor_spi_rw": PASSED
     Test "fpsensor_uart_ro": PASSED
     Test "fpsensor_uart_rw": PASSED
     Test "mpu_ro": PASSED
     Test "mpu_rw": PASSED
     Test "mutex": PASSED
     Test "pingpong": PASSED
     Test "printf": PASSED
     Test "queue": PASSED
     Test "rollback_region0": PASSED
     Test "rollback_region1": PASSED
     Test "rollback_entropy": PASSED
     Test "rtc": PASSED
     Test "sha256": PASSED
     Test "sha256_unrolled": PASSED
     Test "static_if": PASSED
     Test "stdlib": PASSED
     Test "system_is_locked_wp_on": PASSED
     Test "system_is_locked_wp_off": PASSED
     Test "timer_dos": PASSED
     Test "utils": PASSED
     Test "utils_str": PASSED
     Test "panic_data_dartmonkey_v2.0.2887": PASSED
     Test "panic_data_nocturne_fp_v2.2.64": PASSED
     Test "panic_data_nami_fp_v2.2.144": PASSED
Force-Relevant-Builds: all
Signed-off-by: Tom Hughes <tomhughes@chromium.org>

Change-Id: I2c312583a709fedae8fe11d92c22328c3b634bc7

1 files changed, 50 insertions, 49 deletions

diff --git a/driver/tcpm/nct38xx.h b/driver/tcpm/nct38xx.h
index a63a9f0808..af0747a0bd 100644
--- a/driver/tcpm/nct38xx.h
+++ b/driver/tcpm/nct38xx.h
@@ -1,5 +1,5 @@
 /*
- * Copyright 2019 The Chromium OS Authors. All rights reserved.
+ * Copyright 2019 The ChromiumOS Authors
  * Use of this source code is governed by a BSD-style license that can be
  * found in the LICENSE file.
  */
@@ -10,71 +10,72 @@
 #define __CROS_EC_USB_PD_TCPM_NCT38XX_H
 
 /* Chip variant ID (Part number)  */
-#define NCT38XX_VARIANT_MASK               0x1C
-#define NCT38XX_VARIANT_3807               0x0
-#define NCT38XX_VARIANT_3808               0x2
+#define NCT38XX_VARIANT_MASK 0x1C
+#define NCT38XX_VARIANT_3807 0x0
+#define NCT38XX_VARIANT_3808 0x2
 
 /* There are two IO ports in NCT3807 */
-#define NCT38XX_NCT3807_MAX_IO_PORT        2
+#define NCT38XX_NCT3807_MAX_IO_PORT 2
 /* There is only one IO port in NCT3808 */
-#define NCT38XX_NCT3808_MAX_IO_PORT        1
+#define NCT38XX_NCT3808_MAX_IO_PORT 1
 
-#define NCT38XX_SUPPORT_GPIO_FLAGS (GPIO_OPEN_DRAIN | GPIO_INPUT | \
-		GPIO_OUTPUT | GPIO_LOW | GPIO_HIGH | GPIO_INT_F_RISING | \
-		GPIO_INT_F_FALLING | GPIO_INT_F_HIGH | GPIO_INT_F_LOW)
+#define NCT38XX_SUPPORT_GPIO_FLAGS                                           \
+	(GPIO_OPEN_DRAIN | GPIO_INPUT | GPIO_OUTPUT | GPIO_LOW | GPIO_HIGH | \
+	 GPIO_INT_F_RISING | GPIO_INT_F_FALLING | GPIO_INT_F_HIGH |          \
+	 GPIO_INT_F_LOW)
 
 /* I2C interface */
-#define NCT38XX_I2C_ADDR1_1_FLAGS          0x70
-#define NCT38XX_I2C_ADDR1_2_FLAGS          0x71
-#define NCT38XX_I2C_ADDR1_3_FLAGS          0x72
-#define NCT38XX_I2C_ADDR1_4_FLAGS          0x73
+#define NCT38XX_I2C_ADDR1_1_FLAGS 0x70
+#define NCT38XX_I2C_ADDR1_2_FLAGS 0x71
+#define NCT38XX_I2C_ADDR1_3_FLAGS 0x72
+#define NCT38XX_I2C_ADDR1_4_FLAGS 0x73
 
-#define NCT38XX_I2C_ADDR2_1_FLAGS          0x74
-#define NCT38XX_I2C_ADDR2_2_FLAGS          0x75
-#define NCT38XX_I2C_ADDR2_3_FLAGS          0x76
-#define NCT38XX_I2C_ADDR2_4_FLAGS          0x77
+#define NCT38XX_I2C_ADDR2_1_FLAGS 0x74
+#define NCT38XX_I2C_ADDR2_2_FLAGS 0x75
+#define NCT38XX_I2C_ADDR2_3_FLAGS 0x76
+#define NCT38XX_I2C_ADDR2_4_FLAGS 0x77
 
-#define NCT38XX_REG_VENDOR_ID_L            0x00
-#define NCT38XX_REG_VENDOR_ID_H            0x01
-#define NCT38XX_VENDOR_ID                  0x0416
+#define NCT38XX_REG_VENDOR_ID_L 0x00
+#define NCT38XX_REG_VENDOR_ID_H 0x01
+#define NCT38XX_VENDOR_ID 0x0416
 
-#define NCT38XX_PRODUCT_ID                 0xC301
+#define NCT38XX_PRODUCT_ID 0xC301
 
 /*
  * Default value from the ROLE_CTRL register on first boot will depend on
  * whether we're coming from a dead battery state.
  */
-#define NCT38XX_ROLE_CTRL_DEAD_BATTERY	   0x0A
-#define NCT39XX_ROLE_CTRL_GOOD_BATTERY	   0x4A
-
-#define NCT38XX_REG_GPIO_DATA_IN(n)       (0xC0 + ((n) * 8))
-#define NCT38XX_REG_GPIO_DATA_OUT(n)      (0xC1 + ((n) * 8))
-#define NCT38XX_REG_GPIO_DIR(n)           (0xC2 + ((n) * 8))
-#define NCT38XX_REG_GPIO_OD_SEL(n)        (0xC3 + ((n) * 8))
-#define NCT38XX_REG_GPIO_ALERT_RISE(n)    (0xC4 + ((n) * 8))
-#define NCT38XX_REG_GPIO_ALERT_FALL(n)    (0xC5 + ((n) * 8))
-#define NCT38XX_REG_GPIO_ALERT_LEVEL(n)   (0xC6 + ((n) * 8))
-#define NCT38XX_REG_GPIO_ALERT_MASK(n)    (0xC7 + ((n) * 8))
-#define NCT38XX_REG_MUX_CONTROL            0xD0
-#define NCT38XX_REG_GPIO_ALERT_STAT(n)    (0xD4 + (n))
+#define NCT38XX_ROLE_CTRL_DEAD_BATTERY 0x0A
+#define NCT39XX_ROLE_CTRL_GOOD_BATTERY 0x4A
+
+#define NCT38XX_REG_GPIO_DATA_IN(n) (0xC0 + ((n)*8))
+#define NCT38XX_REG_GPIO_DATA_OUT(n) (0xC1 + ((n)*8))
+#define NCT38XX_REG_GPIO_DIR(n) (0xC2 + ((n)*8))
+#define NCT38XX_REG_GPIO_OD_SEL(n) (0xC3 + ((n)*8))
+#define NCT38XX_REG_GPIO_ALERT_RISE(n) (0xC4 + ((n)*8))
+#define NCT38XX_REG_GPIO_ALERT_FALL(n) (0xC5 + ((n)*8))
+#define NCT38XX_REG_GPIO_ALERT_LEVEL(n) (0xC6 + ((n)*8))
+#define NCT38XX_REG_GPIO_ALERT_MASK(n) (0xC7 + ((n)*8))
+#define NCT38XX_REG_MUX_CONTROL 0xD0
+#define NCT38XX_REG_GPIO_ALERT_STAT(n) (0xD4 + (n))
 
 /* NCT3808 only supports GPIO 2/3/4/6/7 */
-#define NCT38XXX_3808_VALID_GPIO_MASK            0xDC
+#define NCT38XXX_3808_VALID_GPIO_MASK 0xDC
 
-#define NCT38XX_REG_CTRL_OUT_EN            0xD2
-#define NCT38XX_REG_CTRL_OUT_EN_SRCEN      (1 << 0)
-#define NCT38XX_REG_CTRL_OUT_EN_FASTEN     (1 << 1)
-#define NCT38XX_REG_CTRL_OUT_EN_SNKEN      (1 << 2)
-#define NCT38XX_REG_CTRL_OUT_EN_CONNDIREN  (1 << 6)
+#define NCT38XX_REG_CTRL_OUT_EN 0xD2
+#define NCT38XX_REG_CTRL_OUT_EN_SRCEN (1 << 0)
+#define NCT38XX_REG_CTRL_OUT_EN_FASTEN (1 << 1)
+#define NCT38XX_REG_CTRL_OUT_EN_SNKEN (1 << 2)
+#define NCT38XX_REG_CTRL_OUT_EN_CONNDIREN (1 << 6)
 
-#define NCT38XX_REG_VBC_FAULT_CTL          0xD7
-#define NCT38XX_REG_VBC_FAULT_CTL_VC_OCP_EN	(1 << 0)
-#define NCT38XX_REG_VBC_FAULT_CTL_VC_SCP_EN	(1 << 1)
-#define NCT38XX_REG_VBC_FAULT_CTL_FAULT_VC_OFF	(1 << 3)
-#define NCT38XX_REG_VBC_FAULT_CTL_VB_OCP_OFF	(1 << 4)
-#define NCT38XX_REG_VBC_FAULT_CTL_VC_OVP_OFF	(1 << 5)
+#define NCT38XX_REG_VBC_FAULT_CTL 0xD7
+#define NCT38XX_REG_VBC_FAULT_CTL_VC_OCP_EN (1 << 0)
+#define NCT38XX_REG_VBC_FAULT_CTL_VC_SCP_EN (1 << 1)
+#define NCT38XX_REG_VBC_FAULT_CTL_FAULT_VC_OFF (1 << 3)
+#define NCT38XX_REG_VBC_FAULT_CTL_VB_OCP_OFF (1 << 4)
+#define NCT38XX_REG_VBC_FAULT_CTL_VC_OVP_OFF (1 << 5)
 
-#define NCT38XX_RESET_HOLD_DELAY_MS	1
+#define NCT38XX_RESET_HOLD_DELAY_MS 1
 
 /*
  * From the datasheet (section 4.4.2 Reset Timing) as following:
@@ -85,8 +86,8 @@
  * NCT3808 (dual port)   |   x   |   3ms |
  * ----------------------+-------+-------+
  */
-#define NCT3807_RESET_POST_DELAY_MS	2
-#define NCT3808_RESET_POST_DELAY_MS	3
+#define NCT3807_RESET_POST_DELAY_MS 2
+#define NCT3808_RESET_POST_DELAY_MS 3
 
 extern const struct tcpm_drv nct38xx_tcpm_drv;