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| author | Caveh Jalali <caveh@chromium.org> | 2020-01-13 20:10:35 -0800 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2020-02-04 17:54:57 +0000 |
| commit | b149d72f08edb528914d17d36435500cf497e792 (patch) | |
| tree | 4fc8474cc51182c983d19b7ee250b0ac2c8e05f2 /driver/tcpm/ps8xxx.h | |
| parent | 514f527666d43fd76460f66bfce1b332763850b2 (diff) | |
| download | chrome-ec-b149d72f08edb528914d17d36435500cf497e792.tar.gz | |
volteer: add USB3 daughterboard supportstabilize-12881.B-master
The USB3 daughterboard uses a ps8815 TCPC. If the CBI FW_CONFIG tag
indicates that such a daughterboard is present, set up the ps8815
as the 2nd TCPC in the system.
BRANCH=none
BUG=b:144397088
TEST=in combination with additional patches, was able to update TCPC
firmware
Change-Id: I50ee57f5aa2efa0b6dbc562f968587f4fe03236c
Signed-off-by: Caveh Jalali <caveh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2013656
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Keith Short <keithshort@chromium.org>
Diffstat (limited to 'driver/tcpm/ps8xxx.h')
| -rw-r--r-- | driver/tcpm/ps8xxx.h | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/driver/tcpm/ps8xxx.h b/driver/tcpm/ps8xxx.h index 08399aba2d..ff78a74041 100644 --- a/driver/tcpm/ps8xxx.h +++ b/driver/tcpm/ps8xxx.h @@ -10,6 +10,7 @@ /* I2C interface */ #define PS8751_I2C_ADDR1_P1_FLAGS 0x09 +#define PS8751_I2C_ADDR1_P2_FLAGS 0x0a #define PS8751_I2C_ADDR1_FLAGS 0x0B #define PS8751_I2C_ADDR2_FLAGS 0x1B #define PS8751_I2C_ADDR3_FLAGS 0x2B @@ -21,6 +22,21 @@ /* Delay between releasing reset and the first I2C read */ #define PS8805_FW_INIT_DELAY_MS 10 +/* Delay from power on to reset de-asserted */ +#define PS8815_PWR_H_RST_H_DELAY_MS 20 +/* + * Delay between releasing reset and the first I2C read + * + * If the delay is too short, I2C fails. + * If the delay is marginal I2C reads return garbage. + * + * With firmware 0x03: + * 10ms is too short + * 20ms is marginal + * 25ms is OK + */ +#define PS8815_FW_INIT_DELAY_MS 40 + #define PS8751_BIST_TIMER_FREQ 15000000 #define PS8751_BIST_DELAY_MS 50 |