diff options
author | Jack Rosenthal <jrosenth@chromium.org> | 2022-06-27 14:52:50 -0600 |
---|---|---|
committer | Chromeos LUCI <chromeos-scoped@luci-project-accounts.iam.gserviceaccount.com> | 2022-07-01 13:58:45 +0000 |
commit | 004506b89138b58b3970a5ec25672c8052fbf4dd (patch) | |
tree | 63fddc7dec49cc674a3efa39cb8e91d08ab87cf3 /driver | |
parent | 5dfb4104c21c3e8f8676c32adce26bd6b7d1a9f2 (diff) | |
download | chrome-ec-004506b89138b58b3970a5ec25672c8052fbf4dd.tar.gz |
driver/ppc/rt1739.h: Format with clang-format
BUG=b:236386294
BRANCH=none
TEST=none
Change-Id: I1b685b68ae363ff05a56cf152b1ed7e53be3a38c
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3730035
Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
Diffstat (limited to 'driver')
-rw-r--r-- | driver/ppc/rt1739.h | 208 |
1 files changed, 104 insertions, 104 deletions
diff --git a/driver/ppc/rt1739.h b/driver/ppc/rt1739.h index 2f9b196011..951b69a350 100644 --- a/driver/ppc/rt1739.h +++ b/driver/ppc/rt1739.h @@ -16,110 +16,110 @@ #define RT1739_ADDR3_FLAGS 0x72 #define RT1739_ADDR4_FLAGS 0x73 -#define RT1739_REG_DEVICE_ID0 0x02 -#define RT1739_DEVICE_ID_ES1 0x11 -#define RT1739_DEVICE_ID_ES2 0x12 - -#define RT1739_REG_SW_RESET 0x04 -#define RT1739_SW_RESET BIT(0) - -#define RT1739_REG_INT_MASK4 0x0C -#define RT1739_FRS_RX_MASK BIT(4) - -#define RT1739_REG_INT_MASK5 0x0D -#define RT1739_BC12_SNK_DONE_MASK BIT(0) - -#define RT1739_REG_INT_EVENT4 0x14 - -#define RT1739_REG_INT_EVENT5 0x15 -#define RT1739_BC12_SNK_DONE_INT BIT(0) - -#define RT1739_REG_INT_STS4 0x1C -#define RT1739_VBUS_VALID BIT(2) -#define RT1739_VBUS_PRESENT BIT(0) - -#define RT1739_REG_SYS_CTRL 0x20 -#define RT1739_OT_EN BIT(4) -#define RT1739_SHUTDOWN_OFF BIT(0) - -#define RT1739_REG_VBUS_SWITCH_CTRL 0x21 -#define RT1739_LV_SRC_EN BIT(2) -#define RT1739_HV_SRC_EN BIT(1) -#define RT1739_HV_SNK_EN BIT(0) - -#define RT1739_REG_VBUS_CTRL1 0x23 -#define RT1739_HVLV_SCP_EN BIT(1) -#define RT1739_HVLV_OCRC_EN BIT(0) - -#define RT1739_REG_VBUS_OV_SETTING 0x24 - -#define RT1739_VBUS_OVP_SEL_SHIFT 0 -#define RT1739_VIN_HV_OVP_SEL_SHIFT 4 -#define RT1739_OVP_SEL_6_0V 0 -#define RT1739_OVP_SEL_6_8V 1 -#define RT1739_OVP_SEL_10_0V 2 -#define RT1739_OVP_SEL_11_5V 3 -#define RT1739_OVP_SEL_14_0V 4 -#define RT1739_OVP_SEL_17_0V 5 -#define RT1739_OVP_SEL_23_0V 6 - -#define RT1739_REG_VBUS_OC_SETTING 0x25 - -#define RT1739_LV_SRC_OCP_SHIFT 4 -#define RT1739_LV_SRC_OCP_SEL_1_25A (0 << RT1739_LV_SRC_OCP_SHIFT) -#define RT1739_LV_SRC_OCP_SEL_1_75A (1 << RT1739_LV_SRC_OCP_SHIFT) -#define RT1739_LV_SRC_OCP_SEL_2_25A (2 << RT1739_LV_SRC_OCP_SHIFT) -#define RT1739_LV_SRC_OCP_SEL_3_3A (3 << RT1739_LV_SRC_OCP_SHIFT) - -#define RT1739_HV_SINK_OCP_SHIFT 0 -#define RT1739_HV_SINK_OCP_SEL_1_25A (0 << RT1739_HV_SINK_OCP_SHIFT) -#define RT1739_HV_SINK_OCP_SEL_1_75A (1 << RT1739_HV_SINK_OCP_SHIFT) -#define RT1739_HV_SINK_OCP_SEL_3_3A (2 << RT1739_HV_SINK_OCP_SHIFT) -#define RT1739_HV_SINK_OCP_SEL_5_5A (3 << RT1739_HV_SINK_OCP_SHIFT) - -#define RT1739_VBUS_FAULT_DIS 0x26 -#define RT1739_OVP_DISVBUS_EN BIT(6) -#define RT1739_UVLO_DISVBUS_EN BIT(5) -#define RT1739_SRCP_DISVBUS_EN BIT(4) -#define RT1739_RCP_DISVBUS_EN BIT(3) -#define RT1739_SCP_DISVBUS_EN BIT(2) -#define RT1739_OCPS_DISVBUS_EN BIT(1) -#define RT1739_OCP_DISVBUS_EN BIT(0) - -#define RT1739_REG_VBUS_DET_EN 0x27 -#define RT1739_VBUS_SAFE5V_EN BIT(2) -#define RT1739_VBUS_SAFE0V_EN BIT(1) -#define RT1739_VBUS_PRESENT_EN BIT(0) - -#define RT1739_REG_CC_FRS_CTRL1 0x2D -#define RT1739_FRS_RX_EN BIT(1) - -#define RT1739_REG_VCONN_CTRL1 0x31 -#define RT1739_VCONN_ORIENT BIT(1) -#define RT1739_VCONN_EN BIT(0) - -#define RT1739_VCONN_ORIENT_CC1 MASK_SET -#define RT1739_VCONN_ORIENT_CC2 MASK_CLR - -#define RT1739_REG_VCONN_CTRL3 0x33 -#define RT1739_VCONN_CLIMIT_EN BIT(0) - -#define RT1739_REG_SBU_CTRL_01 0x38 -#define RT1739_SBUSW_MUX_SEL BIT(4) -#define RT1739_DM_SWEN BIT(1) -#define RT1739_DP_SWEN BIT(0) - -#define RT1739_REG_BC12_SNK_FUNC 0x40 -#define RT1739_BC12_SNK_EN BIT(7) - -#define RT1739_REG_BC12_STAT 0x41 -#define RT1739_PORT_STAT_MASK 0x0F -#define RT1739_PORT_STAT_SDP 0x0D -#define RT1739_PORT_STAT_CDP 0x0E -#define RT1739_PORT_STAT_DCP 0x0F - -#define RT1739_REG_SYS_CTRL1 0x60 -#define RT1739_OSC640K_FORCE_EN BIT(3) +#define RT1739_REG_DEVICE_ID0 0x02 +#define RT1739_DEVICE_ID_ES1 0x11 +#define RT1739_DEVICE_ID_ES2 0x12 + +#define RT1739_REG_SW_RESET 0x04 +#define RT1739_SW_RESET BIT(0) + +#define RT1739_REG_INT_MASK4 0x0C +#define RT1739_FRS_RX_MASK BIT(4) + +#define RT1739_REG_INT_MASK5 0x0D +#define RT1739_BC12_SNK_DONE_MASK BIT(0) + +#define RT1739_REG_INT_EVENT4 0x14 + +#define RT1739_REG_INT_EVENT5 0x15 +#define RT1739_BC12_SNK_DONE_INT BIT(0) + +#define RT1739_REG_INT_STS4 0x1C +#define RT1739_VBUS_VALID BIT(2) +#define RT1739_VBUS_PRESENT BIT(0) + +#define RT1739_REG_SYS_CTRL 0x20 +#define RT1739_OT_EN BIT(4) +#define RT1739_SHUTDOWN_OFF BIT(0) + +#define RT1739_REG_VBUS_SWITCH_CTRL 0x21 +#define RT1739_LV_SRC_EN BIT(2) +#define RT1739_HV_SRC_EN BIT(1) +#define RT1739_HV_SNK_EN BIT(0) + +#define RT1739_REG_VBUS_CTRL1 0x23 +#define RT1739_HVLV_SCP_EN BIT(1) +#define RT1739_HVLV_OCRC_EN BIT(0) + +#define RT1739_REG_VBUS_OV_SETTING 0x24 + +#define RT1739_VBUS_OVP_SEL_SHIFT 0 +#define RT1739_VIN_HV_OVP_SEL_SHIFT 4 +#define RT1739_OVP_SEL_6_0V 0 +#define RT1739_OVP_SEL_6_8V 1 +#define RT1739_OVP_SEL_10_0V 2 +#define RT1739_OVP_SEL_11_5V 3 +#define RT1739_OVP_SEL_14_0V 4 +#define RT1739_OVP_SEL_17_0V 5 +#define RT1739_OVP_SEL_23_0V 6 + +#define RT1739_REG_VBUS_OC_SETTING 0x25 + +#define RT1739_LV_SRC_OCP_SHIFT 4 +#define RT1739_LV_SRC_OCP_SEL_1_25A (0 << RT1739_LV_SRC_OCP_SHIFT) +#define RT1739_LV_SRC_OCP_SEL_1_75A (1 << RT1739_LV_SRC_OCP_SHIFT) +#define RT1739_LV_SRC_OCP_SEL_2_25A (2 << RT1739_LV_SRC_OCP_SHIFT) +#define RT1739_LV_SRC_OCP_SEL_3_3A (3 << RT1739_LV_SRC_OCP_SHIFT) + +#define RT1739_HV_SINK_OCP_SHIFT 0 +#define RT1739_HV_SINK_OCP_SEL_1_25A (0 << RT1739_HV_SINK_OCP_SHIFT) +#define RT1739_HV_SINK_OCP_SEL_1_75A (1 << RT1739_HV_SINK_OCP_SHIFT) +#define RT1739_HV_SINK_OCP_SEL_3_3A (2 << RT1739_HV_SINK_OCP_SHIFT) +#define RT1739_HV_SINK_OCP_SEL_5_5A (3 << RT1739_HV_SINK_OCP_SHIFT) + +#define RT1739_VBUS_FAULT_DIS 0x26 +#define RT1739_OVP_DISVBUS_EN BIT(6) +#define RT1739_UVLO_DISVBUS_EN BIT(5) +#define RT1739_SRCP_DISVBUS_EN BIT(4) +#define RT1739_RCP_DISVBUS_EN BIT(3) +#define RT1739_SCP_DISVBUS_EN BIT(2) +#define RT1739_OCPS_DISVBUS_EN BIT(1) +#define RT1739_OCP_DISVBUS_EN BIT(0) + +#define RT1739_REG_VBUS_DET_EN 0x27 +#define RT1739_VBUS_SAFE5V_EN BIT(2) +#define RT1739_VBUS_SAFE0V_EN BIT(1) +#define RT1739_VBUS_PRESENT_EN BIT(0) + +#define RT1739_REG_CC_FRS_CTRL1 0x2D +#define RT1739_FRS_RX_EN BIT(1) + +#define RT1739_REG_VCONN_CTRL1 0x31 +#define RT1739_VCONN_ORIENT BIT(1) +#define RT1739_VCONN_EN BIT(0) + +#define RT1739_VCONN_ORIENT_CC1 MASK_SET +#define RT1739_VCONN_ORIENT_CC2 MASK_CLR + +#define RT1739_REG_VCONN_CTRL3 0x33 +#define RT1739_VCONN_CLIMIT_EN BIT(0) + +#define RT1739_REG_SBU_CTRL_01 0x38 +#define RT1739_SBUSW_MUX_SEL BIT(4) +#define RT1739_DM_SWEN BIT(1) +#define RT1739_DP_SWEN BIT(0) + +#define RT1739_REG_BC12_SNK_FUNC 0x40 +#define RT1739_BC12_SNK_EN BIT(7) + +#define RT1739_REG_BC12_STAT 0x41 +#define RT1739_PORT_STAT_MASK 0x0F +#define RT1739_PORT_STAT_SDP 0x0D +#define RT1739_PORT_STAT_CDP 0x0E +#define RT1739_PORT_STAT_DCP 0x0F + +#define RT1739_REG_SYS_CTRL1 0x60 +#define RT1739_OSC640K_FORCE_EN BIT(3) extern const struct ppc_drv rt1739_ppc_drv; extern const struct bc12_drv rt1739_bc12_drv; |