summaryrefslogtreecommitdiff
path: root/driver
diff options
context:
space:
mode:
authorKevin K Wong <kevin.k.wong@intel.com>2016-10-11 16:03:19 -0700
committerchrome-bot <chrome-bot@chromium.org>2016-10-13 04:32:04 -0700
commit080c566cc86c8e73af51945afed6cecca5b789f1 (patch)
tree8db4186d175f379b4bff79679e7075baf15b28d2 /driver
parent57ad82c27400d4e4c27fac6ec283910f64b66821 (diff)
downloadchrome-ec-080c566cc86c8e73af51945afed6cecca5b789f1.tar.gz
anx74xx: update usage with its CC_STATUS register
Existing get_cc function depends on set_cc function which marks a "pull" variable to indicate if anx74xx is setting Rp or Rd. However, if DRP auto toggle is used, this "pull" variable is unknown, but CC_STATUS register can differentiate between SRC and SNK, so this "pull" variable is actually not needed. BUG=none BRANCH=none TEST=verify Type-C functionality did not change on Reef. Change-Id: I6cab8d7fcee20ec6e8414b6b2591c5d975d85293 Signed-off-by: Kevin K Wong <kevin.k.wong@intel.com> Reviewed-on: https://chromium-review.googlesource.com/396428 Reviewed-by: David Hendricks <dhendrix@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org>
Diffstat (limited to 'driver')
-rw-r--r--driver/tcpm/anx74xx.c64
1 files changed, 26 insertions, 38 deletions
diff --git a/driver/tcpm/anx74xx.c b/driver/tcpm/anx74xx.c
index 229e79a7c2..073eb92867 100644
--- a/driver/tcpm/anx74xx.c
+++ b/driver/tcpm/anx74xx.c
@@ -19,7 +19,6 @@
struct anx_state {
int polarity;
- int pull;
int vconn_en;
int mux_state;
};
@@ -404,41 +403,32 @@ static int anx74xx_tcpm_get_cc(int port, int *cc1, int *cc2)
int rv = EC_SUCCESS;
int reg = 0;
rv |= tcpc_read(port, ANX74XX_REG_CC_STATUS, &reg);
- if (!anx[port].pull) {/* get CC in sink mode */
- /* CC1 */
- if (reg & BIT_VALUE_OF_SNK_CC1_DEFAULT)
- *cc1 = TYPEC_CC_VOLT_SNK_DEF;
- else if (reg & BIT_VALUE_OF_SNK_CC1_1_P_5)
- *cc1 = TYPEC_CC_VOLT_SNK_1_5;
- else if (reg & BIT_VALUE_OF_SNK_CC1_3_P_0)
- *cc1 = TYPEC_CC_VOLT_SNK_3_0;
- else
- *cc1 = TYPEC_CC_VOLT_OPEN;
- /* CC2 */
- if (reg & BIT_VALUE_OF_SNK_CC2_DEFAULT)
- *cc2 = TYPEC_CC_VOLT_SNK_DEF;
- else if (reg & BIT_VALUE_OF_SNK_CC2_1_P_5)
- *cc2 = TYPEC_CC_VOLT_SNK_1_5;
- else if (reg & BIT_VALUE_OF_SNK_CC2_3_P_0)
- *cc2 = TYPEC_CC_VOLT_SNK_3_0;
- else
- *cc2 = TYPEC_CC_VOLT_OPEN;
- } else {/* get CC in source mode */
- /* CC1 */
- if (reg & BIT_VALUE_OF_SRC_CC1_RA)
- *cc1 = TYPEC_CC_VOLT_RA;
- else if (reg & BIT_VALUE_OF_SRC_CC1_RD)
- *cc1 = TYPEC_CC_VOLT_RD;
- else
- *cc1 = TYPEC_CC_VOLT_OPEN;
- /* CC2 */
- if (reg & BIT_VALUE_OF_SRC_CC2_RA)
- *cc2 = TYPEC_CC_VOLT_RA;
- else if (reg & BIT_VALUE_OF_SRC_CC2_RD)
- *cc2 = TYPEC_CC_VOLT_RD;
- else
- *cc2 = TYPEC_CC_VOLT_OPEN;
- }
+ /* CC1 */
+ if (reg & BIT_VALUE_OF_SNK_CC1_DEFAULT)
+ *cc1 = TYPEC_CC_VOLT_SNK_DEF;
+ else if (reg & BIT_VALUE_OF_SNK_CC1_1_P_5)
+ *cc1 = TYPEC_CC_VOLT_SNK_1_5;
+ else if (reg & BIT_VALUE_OF_SNK_CC1_3_P_0)
+ *cc1 = TYPEC_CC_VOLT_SNK_3_0;
+ else if (reg & BIT_VALUE_OF_SRC_CC1_RA)
+ *cc1 = TYPEC_CC_VOLT_RA;
+ else if (reg & BIT_VALUE_OF_SRC_CC1_RD)
+ *cc1 = TYPEC_CC_VOLT_RD;
+ else
+ *cc1 = TYPEC_CC_VOLT_OPEN;
+ /* CC2 */
+ if (reg & BIT_VALUE_OF_SNK_CC2_DEFAULT)
+ *cc2 = TYPEC_CC_VOLT_SNK_DEF;
+ else if (reg & BIT_VALUE_OF_SNK_CC2_1_P_5)
+ *cc2 = TYPEC_CC_VOLT_SNK_1_5;
+ else if (reg & BIT_VALUE_OF_SNK_CC2_3_P_0)
+ *cc2 = TYPEC_CC_VOLT_SNK_3_0;
+ else if (reg & BIT_VALUE_OF_SRC_CC2_RA)
+ *cc2 = TYPEC_CC_VOLT_RA;
+ else if (reg & BIT_VALUE_OF_SRC_CC2_RD)
+ *cc2 = TYPEC_CC_VOLT_RD;
+ else
+ *cc2 = TYPEC_CC_VOLT_OPEN;
/* clear HPD status*/
if (!(*cc1) && !(*cc2)) {
anx74xx_tcpc_clear_hpd_status(port);
@@ -508,7 +498,6 @@ static int anx74xx_tcpm_set_cc(int port, int pull)
return EC_ERROR_UNKNOWN;
reg |= ANX74XX_REG_CC_PULL_RP;
rv |= tcpc_write(port, ANX74XX_REG_ANALOG_STATUS, reg);
- anx[port].pull = 1;
break;
case TYPEC_CC_RD:
/* Enable Rd */
@@ -517,7 +506,6 @@ static int anx74xx_tcpm_set_cc(int port, int pull)
return EC_ERROR_UNKNOWN;
reg &= ANX74XX_REG_CC_PULL_RD;
rv |= tcpc_write(port, ANX74XX_REG_ANALOG_STATUS, reg);
- anx[port].pull = 0;
break;
default:
rv = EC_ERROR_UNKNOWN;