driver/tcpm: add support for PS8755

The patch adds support for the Parade Tech PS8755 TCPC/SuperSpeed
mux. It is similar chip group as PS8705/PS8805/PS8815.

BUG=b:159042756, b:159082424
BRANCH=none
TEST=make buildall -j.
make BOARD=jinlon with this new CONFIG.

Signed-off-by: Devin Lu <Devin.Lu@quantatw.com>
Change-Id: I38fa02704cc352da0e27eae8cd8bbce89a807975
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2279339
Reviewed-by: Wai-Hong Tam <waihong@google.com>
Reviewed-by: Marco Chen <marcochen@chromium.org>
Commit-Queue: Marco Chen <marcochen@chromium.org>

3 files changed, 19 insertions, 8 deletions

diff --git a/driver/build.mk b/driver/build.mk
index 368f392ed5..39be7cdeee 100644
--- a/driver/build.mk
+++ b/driver/build.mk
@@ -138,6 +138,7 @@ driver-$(CONFIG_USB_PD_TCPM_ANX74XX)+=tcpm/anx74xx.o
 driver-$(CONFIG_USB_PD_TCPM_ANX7688)+=tcpm/anx7688.o
 driver-$(CONFIG_USB_PD_TCPM_ANX7447)+=tcpm/anx7447.o
 driver-$(CONFIG_USB_PD_TCPM_PS8751)+=tcpm/ps8xxx.o
+driver-$(CONFIG_USB_PD_TCPM_PS8755)+=tcpm/ps8xxx.o
 driver-$(CONFIG_USB_PD_TCPM_PS8705)+=tcpm/ps8xxx.o
 driver-$(CONFIG_USB_PD_TCPM_PS8805)+=tcpm/ps8xxx.o
 driver-$(CONFIG_USB_PD_TCPM_PS8815)+=tcpm/ps8xxx.o
diff --git a/driver/tcpm/ps8xxx.c b/driver/tcpm/ps8xxx.c
index 8d68701153..b60dd2f654 100644
--- a/driver/tcpm/ps8xxx.c
+++ b/driver/tcpm/ps8xxx.c
@@ -7,7 +7,9 @@
  * Type-C port manager for Parade PS8XXX with integrated superspeed muxes.
  *
  * Supported TCPCs:
+ * - PS8705
  * - PS8751
+ * - PS8755
  * - PS8805
  * - PS8815
  */
@@ -21,6 +23,7 @@
 #include "usb_pd.h"
 
 #if !defined(CONFIG_USB_PD_TCPM_PS8751) && \
+	!defined(CONFIG_USB_PD_TCPM_PS8755) && \
 	!defined(CONFIG_USB_PD_TCPM_PS8705) && \
 	!defined(CONFIG_USB_PD_TCPM_PS8805) && \
 	!defined(CONFIG_USB_PD_TCPM_PS8815)
@@ -285,7 +288,7 @@ static int ps8xxx_enter_low_power_mode(int port)
 #endif
 
 #if defined(CONFIG_USB_PD_TCPM_PS8751) || defined(CONFIG_USB_PD_TCPM_PS8805) \
- || defined(CONFIG_USB_PD_TCPM_PS8705)
+ || defined(CONFIG_USB_PD_TCPM_PS8705) || defined(CONFIG_USB_PD_TCPM_PS8755)
 /*
  * DCI is enabled by default and burns about 40 mW when the port is in
  * USB2 mode or when a C-to-A dongle is attached, so force it off.
@@ -308,7 +311,7 @@ static int ps8xxx_addr_dci_disable(int port, int i2c_addr, int i2c_reg)
 	}
 	return EC_SUCCESS;
 }
-#endif /* CONFIG_USB_PD_TCPM_PS8751 || CONFIG_USB_PD_TCPM_PS8[78]05 */
+#endif /* CONFIG_USB_PD_TCPM_PS875[15] || CONFIG_USB_PD_TCPM_PS8[78]05 */
 
 #ifdef CONFIG_USB_PD_TCPM_PS8815
 static int ps8xxx_dci_disable(int port)
@@ -339,7 +342,7 @@ static int ps8xxx_dci_disable(int port)
 	/* Disable Auto DCI */
 	p1_addr = PS8751_P3_TO_P1_FLAGS(p3_addr);
 	rv = ps8xxx_addr_dci_disable(port, p1_addr,
-				     PS8805_P1_REG_MUX_USB_DCI_CFG);
+				     PS8XXX_P1_REG_MUX_USB_DCI_CFG);
 
 	/*
 	 * PS8805 will automatically re-assert bit:0 on the
@@ -349,7 +352,7 @@ static int ps8xxx_dci_disable(int port)
 }
 #endif /* CONFIG_USB_PD_TCPM_PS8805 */
 
-#ifdef CONFIG_USB_PD_TCPM_PS8705
+#if defined(CONFIG_USB_PD_TCPM_PS8705) || defined(CONFIG_USB_PD_TCPM_PS8755)
 static int ps8xxx_dci_disable(int port)
 {
 	int p1_addr;
@@ -370,7 +373,7 @@ static int ps8xxx_dci_disable(int port)
 	/* Disable Auto DCI */
 	p1_addr = PS8751_P3_TO_P1_FLAGS(p3_addr);
 	rv = ps8xxx_addr_dci_disable(port, p1_addr,
-				     PS8705_P1_REG_MUX_USB_DCI_CFG);
+				     PS8XXX_P1_REG_MUX_USB_DCI_CFG);
 
 	/* Turn off access to debug pages. */
 	rv |= tcpc_addr_write(port, p3_addr, PS8XXX_REG_I2C_DEBUGGING_ENABLE,
@@ -378,7 +381,7 @@ static int ps8xxx_dci_disable(int port)
 
 	return rv;
 }
-#endif /* CONFIG_USB_PD_TCPM_PS8705 */
+#endif /* CONFIG_USB_PD_TCPM_PS87[05]5 */
 
 #ifdef CONFIG_USB_PD_TCPM_PS8751
 static int ps8xxx_dci_disable(int port)
diff --git a/driver/tcpm/ps8xxx.h b/driver/tcpm/ps8xxx.h
index cfcf45b1a3..2dcf13e5e6 100644
--- a/driver/tcpm/ps8xxx.h
+++ b/driver/tcpm/ps8xxx.h
@@ -67,6 +67,8 @@
 #define IN_HPD  BIT(0)
 #define HPD_IRQ BIT(1)
 
+#define PS8XXX_P1_REG_MUX_USB_DCI_CFG           0x4B
+
 #if defined(CONFIG_USB_PD_TCPM_PS8751)
 /* Vendor defined registers */
 #define PS8XXX_PRODUCT_ID 0x8751
@@ -80,12 +82,18 @@
 #define PS8XXX_REG_MUX_USB_C2SS_HS_THRESHOLD    0xE8
 #define PS8751_REG_MUX_USB_DCI_CFG              0xED
 
+#elif defined(CONFIG_USB_PD_TCPM_PS8755)
+/* Vendor defined registers */
+/* NOTE: The Product ID will read as 0x8803 if the firmware has malfunctioned */
+#define PS8XXX_PRODUCT_ID 0x8755
+
+#define FW_VER_REG                              0x82
+
 #elif defined(CONFIG_USB_PD_TCPM_PS8705)
 /* Vendor defined registers */
 /* NOTE: The Product ID will read as 0x8803 if the firmware has malfunctioned */
 #define PS8XXX_PRODUCT_ID 0x8705
 
-#define PS8705_P1_REG_MUX_USB_DCI_CFG           0x4B
 /* NOTE: The revision will read as 0x00 if the firmware has malfunctioned. */
 #define FW_VER_REG                              0x82
 
@@ -94,7 +102,6 @@
 /* NOTE: The Product ID will read as 0x8803 if the firmware has malfunctioned */
 #define PS8XXX_PRODUCT_ID 0x8805
 
-#define PS8805_P1_REG_MUX_USB_DCI_CFG           0x4B
 #define FW_VER_REG                              0x82
 
 #elif defined(CONFIG_USB_PD_TCPM_PS8815)