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| author | Allen Webb <allenwebb@google.com> | 2018-08-21 07:50:27 -0700 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2018-09-07 18:36:34 -0700 |
| commit | 269ff3569799531fa2b7f7a5def012ea254ceb57 (patch) | |
| tree | 5175c35320981d22707ed108bfe975ab29e37064 /fuzz/fuzz_config.h | |
| parent | 8961872603f6d7b66ef97d444711e83d6a55e2f4 (diff) | |
| download | chrome-ec-269ff3569799531fa2b7f7a5def012ea254ceb57.tar.gz | |
cr50_fuzz: Add minimal fuzzer for pinweaver.
This adds a minimal pinweaver fuzzer as a foundation for further work.
It will not be able to achieve good coverage because it doesn't have a
proper description of the protocol, however it demonstrates that the
prerequisites to build against dcrypto, nvmem_vars, and nvcounter are
satisfied for the host board.
CQ-DEPEND=CL:1183532
BRANCH=none
BUG=chromium:876582
TEST=make -j buildfuzztests &&
./build/host/cr50_fuzz/cr50_fuzz.exe
Change-Id: I520d71c224d583c51dc3292dc051ee8de4a4116a
Signed-off-by: Allen Webb <allenwebb@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1183534
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Diffstat (limited to 'fuzz/fuzz_config.h')
| -rw-r--r-- | fuzz/fuzz_config.h | 56 |
1 files changed, 56 insertions, 0 deletions
diff --git a/fuzz/fuzz_config.h b/fuzz/fuzz_config.h index 6244340c7e..04d69c3743 100644 --- a/fuzz/fuzz_config.h +++ b/fuzz/fuzz_config.h @@ -12,6 +12,62 @@ /* Disable hibernate: We never want to exit while fuzzing. */ #undef CONFIG_HIBERNATE +#ifdef TEST_CR50_FUZZ +#define CONFIG_DCRYPTO +#define CONFIG_PINWEAVER +#define CONFIG_UPTO_SHA512 +#define SHA512_SUPPORT + +/******************************************************************************/ +/* From chip/g/config_chip.h */ + +#define CFG_FLASH_HALF (CONFIG_FLASH_SIZE >> 1) +#define CFG_TOP_SIZE 0x3800 +#define CFG_TOP_A_OFF (CFG_FLASH_HALF - CFG_TOP_SIZE) +#define CFG_TOP_B_OFF (CONFIG_FLASH_SIZE - CFG_TOP_SIZE) + +/******************************************************************************/ +/* From board/cr50/board.h */ +/* Non-volatile counter storage for U2F */ +#define CONFIG_FLASH_NVCOUNTER +#define CONFIG_FLASH_NVCTR_SIZE CONFIG_FLASH_BANK_SIZE +#define CONFIG_FLASH_NVCTR_BASE_A (CONFIG_PROGRAM_MEMORY_BASE + \ + CFG_TOP_A_OFF) +#define CONFIG_FLASH_NVCTR_BASE_B (CONFIG_PROGRAM_MEMORY_BASE + \ + CFG_TOP_B_OFF) +/* We're using TOP_A for partition 0, TOP_B for partition 1 */ +#define CONFIG_FLASH_NVMEM +/* Offset to start of NvMem area from base of flash */ +#define CONFIG_FLASH_NVMEM_OFFSET_A (CFG_TOP_A_OFF + CONFIG_FLASH_NVCTR_SIZE) +#define CONFIG_FLASH_NVMEM_OFFSET_B (CFG_TOP_B_OFF + CONFIG_FLASH_NVCTR_SIZE) +/* Address of start of Nvmem area */ +#define CONFIG_FLASH_NVMEM_BASE_A (CONFIG_PROGRAM_MEMORY_BASE + \ + CONFIG_FLASH_NVMEM_OFFSET_A) +#define CONFIG_FLASH_NVMEM_BASE_B (CONFIG_PROGRAM_MEMORY_BASE + \ + CONFIG_FLASH_NVMEM_OFFSET_B) +/* Size partition in NvMem */ +#define NVMEM_PARTITION_SIZE (CFG_TOP_SIZE - CONFIG_FLASH_NVCTR_SIZE) +/* Size in bytes of NvMem area */ +#define CONFIG_FLASH_NVMEM_SIZE (NVMEM_PARTITION_SIZE * NVMEM_NUM_PARTITIONS) +/* Enable <key, value> variable support. */ +#define CONFIG_FLASH_NVMEM_VARS +#define NVMEM_CR50_SIZE 272 +#define CONFIG_FLASH_NVMEM_VARS_USER_SIZE NVMEM_CR50_SIZE + +#ifndef __ASSEMBLER__ +enum nvmem_users { + NVMEM_TPM = 0, + NVMEM_CR50, + NVMEM_NUM_USERS +}; +#endif +#define CONFIG_FLASH_NVMEM_VARS_USER_NUM NVMEM_NUM_USERS + +/******************************************************************************/ +#define CONFIG_SW_CRC + +#endif /* TEST_CR50_FUZZ */ + #ifdef TEST_HOST_COMMAND_FUZZ #undef CONFIG_HOSTCMD_DEBUG_MODE |