diff options
| author | Randall Spangler <rspangler@chromium.org> | 2017-07-31 16:24:08 -0700 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2017-08-01 13:01:41 -0700 |
| commit | c7b11ca7b855d35dce75502429ed56af990ea41a (patch) | |
| tree | b2eaef6673a012941835ad80b9b6a23178067af0 /include/case_closed_debug.h | |
| parent | 00ea73ab166ebc8a2c4b5693b7fa776c76c7fe45 (diff) | |
| download | chrome-ec-c7b11ca7b855d35dce75502429ed56af990ea41a.tar.gz | |
cr50: CCD V1 controls UART access
AP and EC UART now use the CCD V1 capabilities to determine when
access is allowed. Transmit to AP and EC can be toggled independently
from read access to output from those UARTs.
Note that disabling read access disables both transmit and receive.
That is, it's not possible to set a UART where transmit is allowed but
receive isn't. Why would you want to do that, anyway?
See go/cr50-ccd-wp for more information.
BUG=b:62537474
BRANCH=cr50
TEST=manual with CR50_DEV=1
ccdoops
ccdset cr50fullconsole always -> so we can use ccd command for testing
ccd -> AP RX+TX, EC RX+TX
ccdset uartecrx unlesslocked
ccdset uartectx ifopened
ccdset uartaprx always
ccdset uartaptx unlesslocked
ccdunlock
ccd -> AP RX+TX, EC RX
ccdlock
ccd -> AP RX, EC disabled
ccdoops
ccdset cr50fullconsole always
ccd -> AP RX+TX, EC RX+TX
ccdset uartaprx ifopened
ccdlock
ccd -> AP disabled, EC RX
Change-Id: I55db5897bb52cd60658ab221eadf5c59fc86744a
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/595196
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Diffstat (limited to 'include/case_closed_debug.h')
| -rw-r--r-- | include/case_closed_debug.h | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/include/case_closed_debug.h b/include/case_closed_debug.h index 2edbf1763d..456bafa58d 100644 --- a/include/case_closed_debug.h +++ b/include/case_closed_debug.h @@ -91,11 +91,11 @@ enum ccd_flag { /* Capabilities */ enum ccd_capability { - /* AP and EC UART output and input */ - CCD_CAP_AP_UART_OUTPUT = 0, - CCD_CAP_AP_UART_INPUT = 1, - CCD_CAP_EC_UART_OUTPUT = 2, - CCD_CAP_EC_UART_INPUT = 3, + /* AP and EC UART output (from AP/EC) and input (to AP/EC) */ + CCD_CAP_AP_TX_CR50_RX = 0, + CCD_CAP_AP_RX_CR50_TX = 1, + CCD_CAP_EC_TX_CR50_RX = 2, + CCD_CAP_EC_RX_CR50_TX = 3, /* Access to AP SPI flash */ CCD_CAP_AP_FLASH = 4, |