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| author | Kyoung Kim <kyoung.il.kim@intel.com> | 2015-10-01 19:22:01 -0700 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2015-11-19 20:01:58 -0800 |
| commit | ebf92ecc839a6361605eb4c3ac7cb44fa4eb603a (patch) | |
| tree | a7ef9a393bc55799e9b61b9b4a9d5b613fedc216 /include/chipset.h | |
| parent | 8704de934edc294c1efb3115cb8192bbc7f0dc65 (diff) | |
| download | chrome-ec-ebf92ecc839a6361605eb4c3ac7cb44fa4eb603a.tar.gz | |
Kunimitsu: Add S0ix on SLP_S0 assertion
On assertion of SLP_S0, EC goes to S0ix while system is in Lucid sleep
and EC is eligable to enter heavy sleep idle task.
Wakeup from S0ix by lid open, any key press, power button or track pad
will be done by PCH block by asserting SLP_S0.
At S0ix, 1 msec pulse will be generated every 8sec and this signal
should be ignored since this is NOT S0ix entry/exit related and defered
interrupt for SLP_S0 were added.
BRANCH=master
BUG=none
TEST=in OS shell, run following commands.
Following command is valid with coreboot with S0ix patches.
"echo freeze > /sys/power/state"
then,
Measure EC power consumption and compare it with one in S0.
And on EC console, there should be NO periodic message, "power
state 4 = S0ix, in 0x001d" every 8 sec.
Change-Id: Ia9cf5256b1ad7234815d4b6dbe2b45788aaf49dd
Signed-off-by: Kyoung Kim <kyoung.il.kim@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/307947
Commit-Ready: Kyoung Il Kim <kyoung.il.kim@intel.com>
Tested-by: Kyoung Il Kim <kyoung.il.kim@intel.com>
Reviewed-by: Kyoung Il Kim <kyoung.il.kim@intel.com>
Reviewed-by: Shawn N <shawnn@chromium.org>
Diffstat (limited to 'include/chipset.h')
| -rw-r--r-- | include/chipset.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/chipset.h b/include/chipset.h index 0237767fbf..4b91a6e57f 100644 --- a/include/chipset.h +++ b/include/chipset.h @@ -30,6 +30,7 @@ enum chipset_state_mask { CHIPSET_STATE_SOFT_OFF = 0x02, /* Soft off (S5) */ CHIPSET_STATE_SUSPEND = 0x04, /* Suspend (S3) */ CHIPSET_STATE_ON = 0x08, /* On (S0) */ + CHIPSET_STATE_STANDBY = 0x10, /* Standby (S0ix) */ /* Common combinations */ CHIPSET_STATE_ANY_OFF = (CHIPSET_STATE_HARD_OFF | CHIPSET_STATE_SOFT_OFF), /* Any off state */ |