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| author | Wai-Hong Tam <waihong@google.com> | 2018-09-19 15:10:57 -0700 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2018-10-30 01:04:51 -0700 |
| commit | b47ed2a108c679de26be89fa258931ddf040e446 (patch) | |
| tree | a170884ea21d2a7c21f0a72ed06d299a11ed857b /include/chipset.h | |
| parent | 5f068e277ba6de108615aa3190ccb14b316b67f0 (diff) | |
| download | chrome-ec-b47ed2a108c679de26be89fa258931ddf040e446.tar.gz | |
cheza: Monitor the WARM_RESET_L signal to hold AP
This change is a backup solution if JTAG_SRST gets fused out.
The WARM_RESET_L signal is wired to JTAG_SRST, such that we can
hold AP when servo/H1 programs the AP SPI flash. But when JTAG_SRST
gets fused out (just in case it happens), still have a way to hold
AP, i.e. overdriving the AP_RST_L and PS_HOLD signals.
The WARM_RESET_L signal is pulled by a rail from PMIC, the same as
POWER_GOOD. The drop of WARM_RESET_L may be caused by either servo/
cr50 holds the signal or its pull-up rail drops. We should handle
both cases.
Also add WARM_RESET_L as one of the power signals for debug purpose.
BRANCH=none
BUG=b:78194018, b:112723105, b:112564635
TEST=Ran "dut-control warm_reset:on" and "dut-control warm_reset:off".
Scoped the signal of AP_RST_L and PS_HOLD to verify the correctness.
Verified AP hold and back booting up.
TEST=Changed to the gpio.inc to swap LID_OPEN and WARM_RESET_L and
ran "dut-control lid_open:no" and "dut-control lid_open:yes" to emualte
the case JTAG_SRST gets fused out. Scoped the signal correctness.
Verified AP hold and back booting up. Ran flashrom to program AP SPI
flash through servo.
Change-Id: I71ebd920171da9994192f7742675feb7cb39ce2f
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1234743
Diffstat (limited to 'include/chipset.h')
| -rw-r--r-- | include/chipset.h | 9 |
1 files changed, 8 insertions, 1 deletions
diff --git a/include/chipset.h b/include/chipset.h index b4b630f032..7363707b38 100644 --- a/include/chipset.h +++ b/include/chipset.h @@ -185,8 +185,8 @@ static inline void power_interrupt(enum gpio_signal signal) { } static inline void chipset_handle_espi_reset_assert(void) { } static inline void chipset_handle_reboot(void) { } static inline void chipset_reset_request_interrupt(enum gpio_signal signal) { } +static inline void chipset_warm_reset_interrupt(enum gpio_signal signal) { } static inline void chipset_watchdog_interrupt(enum gpio_signal signal) { } -static inline void chipset_power_signal_interrupt(enum gpio_signal signal) { } #endif /* !HAS_TASK_CHIPSET */ @@ -210,6 +210,13 @@ void chipset_handle_reboot(void); void chipset_reset_request_interrupt(enum gpio_signal signal); /** + * GPIO interrupt handler of warm reset signal from servo or H1. + * + * It is used in SDM845 chipset power sequence. + */ +void chipset_warm_reset_interrupt(enum gpio_signal signal); + +/** * GPIO interrupt handler of watchdog from AP. * * It is used in MT8183 chipset, where it must be setup to trigger on falling |