diff options
author | Alec Berg <alecaberg@chromium.org> | 2013-10-08 16:46:58 -0700 |
---|---|---|
committer | chrome-internal-fetch <chrome-internal-fetch@google.com> | 2013-10-10 23:14:20 +0000 |
commit | 27e063ea100086a913ed655b611c88e077de5b00 (patch) | |
tree | 701999fd9367e30d008179243a0fc95fc51c5175 /include/clock.h | |
parent | f7e69a211ce0121ec06c79f6d82574d3347dec2f (diff) | |
download | chrome-ec-27e063ea100086a913ed655b611c88e077de5b00.tar.gz |
lm4: Modified clock gating to allow easy expansion to low power.
Created a new function to enable or disable clocks to various
peripherals. This new function makes it easy to specify if you
want the clock enabled in run mode, sleep mode, and/or deep
sleep mode.
Added infrastructure to specify which GPIOs should interrupt the
EC from deep sleep.
BUG=none
BRANCH=none
TEST=Passes all unit tests. Ran on a peppy and verified that
the clock gate control registers in run mode (LM4_RCGC regs)
were the same before and after this change.
Change-Id: Ia5009ac8c837f61dca52fe86ebdeede2e1a7fe4d
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/172454
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Diffstat (limited to 'include/clock.h')
-rw-r--r-- | include/clock.h | 26 |
1 files changed, 26 insertions, 0 deletions
diff --git a/include/clock.h b/include/clock.h index 6703249076..343b43ecee 100644 --- a/include/clock.h +++ b/include/clock.h @@ -67,6 +67,32 @@ enum { SLEEP_MASK_FORCE = (1 << 31), /* Force disabling low power modes */ }; +/* Clock gate control modes for clock_enable_peripheral() */ +#define CGC_MODE_RUN (1 << 0) +#define CGC_MODE_SLEEP (1 << 1) +#define CGC_MODE_DSLEEP (1 << 2) +#define CGC_MODE_ALL (CGC_MODE_RUN | CGC_MODE_SLEEP | CGC_MODE_DSLEEP) + +/** + * Enable clock to peripheral by setting the CGC register pertaining + * to run, sleep, and/or deep sleep modes. + * + * @param offset Offset of the peripheral. See enum clock_gate_offsets. + * @param mask Bit mask of the bits within CGC reg to set. + * @param mode Which mode(s) to enable the clock for + */ +void clock_enable_peripheral(uint32_t offset, uint32_t mask, uint32_t mode); + +/** + * Disable clock to peripheral by setting the CGC register pertaining + * to run, sleep, and/or deep sleep modes. + * + * @param offset Offset of the peripheral. See enum clock_gate_offsets. + * @param mask Bit mask of the bits within CGC reg to clear. + * @param mode Which mode(s) to enable the clock for + */ +void clock_disable_peripheral(uint32_t offset, uint32_t mask, uint32_t mode); + void enable_sleep(uint32_t mask); void disable_sleep(uint32_t mask); |