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authorDivya Jyothi <divya.jyothi@intel.com>2014-10-27 09:48:38 -0700
committerchrome-internal-fetch <chrome-internal-fetch@google.com>2014-11-06 09:26:21 +0000
commit75ced738383d4b3bdf4e95b31c193cb0366e69cf (patch)
tree304e1fef1e803c3fb0af2241b9fd60c1c4815f5e /include/config.h
parent41cde665166da1aced2ece17f7b503c78cdb5c8f (diff)
downloadchrome-ec-75ced738383d4b3bdf4e95b31c193cb0366e69cf.tar.gz
Strago: Initial Version of Strago Board added.
Modules that are enabled are listed below: - Power Sequencing - Keyboard Scan and Protocol - LPC to support Keyboard - Power Button Task ec.spi.bin has to be generated manualy using pack_ec.py BUG=None BRANCH=None TEST=Tested on Stargo-Proto board Change-Id: Ic5d504c3d6e9c7c5f3482fb7e9e37800b6274824 Signed-off-by: Divya Jyothi <divya.jyothi@intel.com> Reviewed-on: https://chromium-review.googlesource.com/226303 Reviewed-by: Vic Yang <victoryang@chromium.org>
Diffstat (limited to 'include/config.h')
-rw-r--r--include/config.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/include/config.h b/include/config.h
index c7ebc9a1a8..92cd267121 100644
--- a/include/config.h
+++ b/include/config.h
@@ -282,6 +282,7 @@
#undef CONFIG_CHIPSET_IVYBRIDGE /* Intel Ivy Bridge (x86) */
#undef CONFIG_CHIPSET_ROCKCHIP /* Rockchip rk32xx */
#undef CONFIG_CHIPSET_TEGRA /* nVidia Tegra 5 */
+#undef CONFIG_CHIPSET_BRASWELL /* Intel Braswell (x86) */
/* Support chipset throttling */
#undef CONFIG_CHIPSET_CAN_THROTTLE