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author | Philip Chen <philipchen@google.com> | 2021-06-16 16:38:44 -0700 |
---|---|---|
committer | Commit Bot <commit-bot@chromium.org> | 2021-06-29 01:40:44 +0000 |
commit | 6d163016d305d63a72ca3884cc9da9b618f6609d (patch) | |
tree | c601e7e0c2a7eb3ea5f1dedf44ffc155053ff1cd /include/cros_board_info.h | |
parent | 8442045be1484112995eccee740bcff350e7f9a8 (diff) | |
download | chrome-ec-6d163016d305d63a72ca3884cc9da9b618f6609d.tar.gz |
cbi: Separate CBI EEPROM driver from CBI protocol
Factor out the physical storage driver (cbi_eeprom.c) from the CBI
data/protocol layer (cbi.c), setting up the groundwork to support more
options of CBI sources.
BRANCH=None
BUG=b:186264627
TEST=make buildall -j
Change-Id: Ic30a6f789970dd6723cf70d4e852ddb7161f796f
Signed-off-by: Philip Chen <philipchen@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2965848
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Commit-Queue: Philip Chen <philipchen@chromium.org>
Tested-by: Philip Chen <philipchen@chromium.org>
Diffstat (limited to 'include/cros_board_info.h')
-rw-r--r-- | include/cros_board_info.h | 47 |
1 files changed, 43 insertions, 4 deletions
diff --git a/include/cros_board_info.h b/include/cros_board_info.h index 7566bd7173..f4fa905573 100644 --- a/include/cros_board_info.h +++ b/include/cros_board_info.h @@ -12,7 +12,7 @@ #define CBI_VERSION_MAJOR 0 #define CBI_VERSION_MINOR 0 -#define CBI_EEPROM_SIZE 256 +#define CBI_IMAGE_SIZE 256 static const uint8_t cbi_magic[] = { 0x43, 0x42, 0x49 }; /* 'C' 'B' 'I' */ struct cbi_header { @@ -41,6 +41,35 @@ struct cbi_data { uint8_t value[]; /* data value */ } __attribute__((packed)); +enum cbi_cache_status { + CBI_CACHE_STATUS_SYNCED = 0, + CBI_CACHE_STATUS_INVALID = 1 +}; + +enum cbi_storage_type { + CBI_STORAGE_TYPE_EEPROM = 0, +}; + +/* + * Driver for storage media access + */ +struct cbi_storage_driver { + /* Write the whole CBI from RAM to storage media (i.e. sync) */ + int (*store)(uint8_t *cache); + /* + * Read blocks from storage media to RAM. Note that the granularity + * of load function is asymmetrical to that of the store function. + */ + int (*load)(uint8_t offset, uint8_t *data, int len); + /* Return write protect status for the storage media */ + int (*is_protected)(void); +}; + +struct cbi_storage_config_t { + enum cbi_storage_type storage_type; + const struct cbi_storage_driver *drv; +}; + /** * Board info accessors * @@ -161,13 +190,23 @@ int cbi_board_override(enum cbi_data_tag tag, uint8_t *buf, uint8_t *size); */ int cbi_set_fw_config(uint32_t fw_config); -#ifdef TEST_BUILD /** - * Test only declarations. Firmware shouldn't need them. + * Initialize CBI cache */ int cbi_create(void); -int cbi_write(void); + +/** + * Override CBI cache status to EC_CBI_CACHE_INVALID + */ void cbi_invalidate_cache(void); + +#ifdef TEST_BUILD +/** + * Write the locally cached CBI to EEPROM. + * + * @return EC_RES_SUCCESS on success or EC_RES_* otherwise. + */ +int cbi_write(void); #endif #endif /* __CROS_EC_CROS_BOARD_INFO_H */ |