diff options
author | Randall Spangler <rspangler@chromium.org> | 2013-06-26 21:41:21 -0700 |
---|---|---|
committer | ChromeBot <chrome-bot@google.com> | 2013-06-27 12:48:06 -0700 |
commit | 31439d13e45636ad08f94f70e3d18460d2a7707f (patch) | |
tree | 429c32cf94394b6b7702009b5ebc48026d90a33b /include/dma.h | |
parent | 5c82e77c1979d448517b8fa9387faefba62effb0 (diff) | |
download | chrome-ec-31439d13e45636ad08f94f70e3d18460d2a7707f.tar.gz |
stm32: Clean up DMA register usage
Bitfields are now in registers.h where they belong.
BUG=chrome-os-partner:20529
BRANCH=none
TEST='crosec test' from u-boot still works
Change-Id: I726550a32b61111c906c1b10c628c5e47eff74fb
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/60179
Diffstat (limited to 'include/dma.h')
-rw-r--r-- | include/dma.h | 85 |
1 files changed, 6 insertions, 79 deletions
diff --git a/include/dma.h b/include/dma.h index eeefc45654..1b03795b36 100644 --- a/include/dma.h +++ b/include/dma.h @@ -5,58 +5,11 @@ * Register map and API for STM32 processor dma registers */ -#ifndef __STM32_DMA -#define __STM32_DMA +#ifndef __CROS_EC_DMA_H +#define __CROS_EC_DMA_H #include "common.h" - -/* - * Available DMA channels, numbered from 0. - * - * Note: The STM datasheet tends to number things from 1. We should ask - * the European elevator engineers to talk to MCU engineer counterparts - * about this. This means that if the datasheet refers to channel n, - * you need to use DMAC_CHn (=n-1) in the code. - * - * Also note that channels are overloaded; obviously you can only use one - * function on each channel at a time. - */ -enum dma_channel { - /* Channel numbers */ - DMAC_CH1 = 0, - DMAC_CH2 = 1, - DMAC_CH3 = 2, - DMAC_CH4 = 3, - DMAC_CH5 = 4, - DMAC_CH6 = 5, - DMAC_CH7 = 6, - - /* Channel functions */ - DMAC_ADC = DMAC_CH1, - DMAC_SPI1_RX = DMAC_CH2, - DMAC_SPI1_TX = DMAC_CH3, - DMAC_I2C2_TX = DMAC_CH4, - DMAC_I2C2_RX = DMAC_CH5, - DMAC_USART1_TX = DMAC_CH4, - DMAC_USART1_RX = DMAC_CH5, - DMAC_I2C1_TX = DMAC_CH6, - DMAC_I2C1_RX = DMAC_CH7, - - /* Only DMA1 (with 7 channels) is present on STM32F100 and STM32L151x */ - DMA_NUM_CHANNELS = 7, -}; - -/* Registers for a single channel of the DMA controller */ -struct dma_channel_regs { - uint32_t ccr; /* Control */ - uint32_t cndtr; /* Number of data to transfer */ - uint32_t cpar; /* Peripheral address */ - uint32_t cmar; /* Memory address */ - uint32_t reserved; -}; - -/* Always use dma_channel_t so volatile keyword is included! */ -typedef volatile struct dma_channel_regs dma_channel_t; +#include "registers.h" /* DMA channel options */ struct dma_option { @@ -66,32 +19,6 @@ struct dma_option { used to select memory size. */ }; -/* Defines for accessing DMA ccr */ -#define DMA_PL_SHIFT 12 -#define DMA_PL_MASK (3 << DMA_PL_SHIFT) -enum { - DMA_PL_LOW, - DMA_PL_MEDIUM, - DMA_PL_HIGH, - DMA_PL_VERY_HIGH, -}; - -#define DMA_EN (1 << 0) -#define DMA_TCIE (1 << 1) -#define DMA_HTIE (1 << 2) -#define DMA_TEIE (1 << 3) -#define DMA_DIR_FROM_MEM_MASK (1 << 4) -#define DMA_MINC_MASK (1 << 7) -#define DMA_TCIF(channel) (1 << (1 + 4 * channel)) - -#define DMA_MSIZE_BYTE (0 << 10) -#define DMA_MSIZE_HALF_WORD (1 << 10) -#define DMA_MSIZE_WORD (2 << 10) - -#define DMA_PSIZE_BYTE (0 << 8) -#define DMA_PSIZE_HALF_WORD (1 << 8) -#define DMA_PSIZE_WORD (2 << 8) - #define DMA_POLLING_INTERVAL_US 100 /* us */ #define DMA_TRANSFER_TIMEOUT_US (100 * MSEC) /* us */ @@ -101,7 +28,7 @@ enum { * @param channel Channel to read * @return pointer to DMA channel registers */ -dma_channel_t *dma_get_channel(enum dma_channel channel); +stm32_dma_chan_t *dma_get_channel(enum dma_channel channel); /** * Prepare a DMA transfer to transmit data from memory to a peripheral @@ -147,14 +74,14 @@ void dma_disable(enum dma_channel channel); * @return number of bytes completed on a channel, or 0 if this channel is * not enabled */ -int dma_bytes_done(dma_channel_t *chan, int orig_count); +int dma_bytes_done(stm32_dma_chan_t *chan, int orig_count); /** * Start a previously-prepared dma channel * * @param chan Channel to start, from dma_get_channel() */ -void dma_go(dma_channel_t *chan); +void dma_go(stm32_dma_chan_t *chan); #ifdef CONFIG_DMA_HELP /** |