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authorRandall Spangler <rspangler@chromium.org>2015-02-25 10:46:34 -0800
committerChromeOS Commit Bot <chromeos-commit-bot@chromium.org>2015-02-26 20:31:51 +0000
commit6aebf13a6b9a88f5c15ef2e7a8d14126add9f66a (patch)
tree698c6c058ed527b1d6f9989399b8efb4590dd2df /include/ec_commands.h
parentdd9c1447ac2625e8f78af07bb88a417b908ab34b (diff)
downloadchrome-ec-6aebf13a6b9a88f5c15ef2e7a8d14126add9f66a.tar.gz
Add CONFIG_FLASH_PSTATE option to enable persistent flash WP state
Previously, the flash module assumed it needed to emulate a SPI write protect register using a bank of flash to hold the persistent flash write protect state. This is not true for mec and ncpx chips under development, which use external SPI flash. So, gate that code with CONFIG_FLASH_PSTATE. For compatibility, leave it on by default (as we do with CONFIG_FLASH_MAPPED). There is no change to the behavior of currently supported chips, since all of them already assume pstate is present. Removing this feature from npcx will be done in a subsequent change. BUG=chrome-os-partner:34346 BRANCH=strago TEST=make buildall -j; verify flash wp and flashinfo work properly on samus Change-Id: Ie044eb042863e4a7359ea540166ffd8d0089589d Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/253632 Reviewed-by: Shawn N <shawnn@chromium.org> Reviewed-by: Mulin Chao <mlchao@nuvoton.com>
Diffstat (limited to 'include/ec_commands.h')
-rw-r--r--include/ec_commands.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/include/ec_commands.h b/include/ec_commands.h
index d54feecbe8..c03a55af77 100644
--- a/include/ec_commands.h
+++ b/include/ec_commands.h
@@ -838,7 +838,7 @@ struct ec_params_flash_erase {
* re-requesting the desired flags, or by a hard reset if that fails.
*/
#define EC_FLASH_PROTECT_ERROR_INCONSISTENT (1 << 5)
-/* Entile flash code protected when the EC boots */
+/* Entire flash code protected when the EC boots */
#define EC_FLASH_PROTECT_ALL_AT_BOOT (1 << 6)
struct ec_params_flash_protect {