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| author | Randall Spangler <rspangler@chromium.org> | 2015-02-25 10:46:34 -0800 |
|---|---|---|
| committer | ChromeOS Commit Bot <chromeos-commit-bot@chromium.org> | 2015-02-26 20:31:51 +0000 |
| commit | 6aebf13a6b9a88f5c15ef2e7a8d14126add9f66a (patch) | |
| tree | 698c6c058ed527b1d6f9989399b8efb4590dd2df /include/flash.h | |
| parent | dd9c1447ac2625e8f78af07bb88a417b908ab34b (diff) | |
| download | chrome-ec-6aebf13a6b9a88f5c15ef2e7a8d14126add9f66a.tar.gz | |
Add CONFIG_FLASH_PSTATE option to enable persistent flash WP state
Previously, the flash module assumed it needed to emulate a SPI write
protect register using a bank of flash to hold the persistent flash
write protect state. This is not true for mec and ncpx chips under
development, which use external SPI flash. So, gate that code with
CONFIG_FLASH_PSTATE. For compatibility, leave it on by default (as we
do with CONFIG_FLASH_MAPPED).
There is no change to the behavior of currently supported chips, since
all of them already assume pstate is present. Removing this feature
from npcx will be done in a subsequent change.
BUG=chrome-os-partner:34346
BRANCH=strago
TEST=make buildall -j; verify flash wp and flashinfo work properly on samus
Change-Id: Ie044eb042863e4a7359ea540166ffd8d0089589d
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/253632
Reviewed-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Mulin Chao <mlchao@nuvoton.com>
Diffstat (limited to 'include/flash.h')
| -rw-r--r-- | include/flash.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/include/flash.h b/include/flash.h index 3a4a120938..f2cc480dba 100644 --- a/include/flash.h +++ b/include/flash.h @@ -23,10 +23,12 @@ #define RW_BANK_COUNT (CONFIG_FW_RW_SIZE / CONFIG_FLASH_BANK_SIZE) /* Persistent protection state flash offset / size / bank */ +#ifdef CONFIG_FLASH_PSTATE #define PSTATE_OFFSET CONFIG_FW_PSTATE_OFF #define PSTATE_SIZE CONFIG_FW_PSTATE_SIZE #define PSTATE_BANK (PSTATE_OFFSET / CONFIG_FLASH_BANK_SIZE) #define PSTATE_BANK_COUNT (PSTATE_SIZE / CONFIG_FLASH_BANK_SIZE) +#endif /* Range of write protection */ enum flash_wp_range { |