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authorRandall Spangler <rspangler@chromium.org>2013-04-11 13:02:27 -0700
committerChromeBot <chrome-bot@google.com>2013-04-11 15:38:09 -0700
commit79c6132a6e6d9b5d00a33d7f73795cd88bd97017 (patch)
tree30943690ad8c61650359017b153cce026dc4a926 /include/gpio.h
parentb9d0d9c60b2b826f37192f6ffb96b23f1c18d6de (diff)
downloadchrome-ec-79c6132a6e6d9b5d00a33d7f73795cd88bd97017.tar.gz
Allow GPIO alternate function 0
gpio_set_alternate_function() used 0 to mean "normal GPIO function". But on chips like STM32L, alternate function 0 is actually a function on some pins. So change "normal GPIO function" to -1. Also add support for this on STM32L. BUG=chrome-os-partner:18343 BRANCH=none TEST=build and boot link and daisy Change-Id: I9cdd9ad91a315b616e373a0dc9a50545cf9d20fa Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/47903 Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Diffstat (limited to 'include/gpio.h')
-rw-r--r--include/gpio.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/include/gpio.h b/include/gpio.h
index 9dd97cb3aa..fca33231e0 100644
--- a/include/gpio.h
+++ b/include/gpio.h
@@ -133,7 +133,7 @@ int gpio_enable_interrupt(enum gpio_signal signal);
*
* @param port GPIO port to set (LM4_GPIO_*)
* @param mask Bitmask of pins on that port to affect
- * @param func Alternate function; if 0, configures the specified
+ * @param func Alternate function; if <0, configures the specified
* GPIOs for normal GPIO operation.
*/
void gpio_set_alternate_function(int port, int mask, int func);